Vendor import of llvm trunk r161861:

http://llvm.org/svn/llvm-project/llvm/trunk@161861

6 files changed, 264 insertions, 1 deletions

diff --git a/test/Bitcode/2012-05-07-SwitchInstRangesSupport.ll b/test/Bitcode/2012-05-07-SwitchInstRangesSupport.ll
new file mode 100644
index 0000000..583b9a8
--- /dev/null
+++ b/test/Bitcode/2012-05-07-SwitchInstRangesSupport.ll
@@ -0,0 +1,33 @@
+; RUN: rm -f %t.bc
+; RUN: rm -f %t.ll
+; RUN: rm -f %t2.bc
+; RUN: rm -f %t2.ll
+; RUN: llvm-as %s -o %t.bc
+; RUN: llvm-dis %t.bc -o - | tail -n +2 > %t.ll
+; RUN: llvm-as %t.ll -o %t2.bc
+; RUN: llvm-dis %t2.bc -o - | tail -n +2 > %t2.ll
+; RUN: llvm-diff %t.ll %t2.ll
+
+define void @test() {
+  %mem = alloca i32
+  store i32 2, i32* %mem
+  %c = load i32* %mem
+  switch i32 %c, label %exit [
+      i32 1, label %exit
+      i32 2, label %exit
+  ]
+exit:
+  ret void
+}
+define void @test_wide() {
+  %mem = alloca i256
+  store i256 2, i256* %mem
+  %c = load i256* %mem
+  switch i256 %c, label %exit [
+      i256 123456789012345678901234567890, label %exit
+      i256 2, label %exit
+  ]
+exit:
+  ret void
+}
+
diff --git a/test/Bitcode/arm32_neon_vcnt_upgrade.ll b/test/Bitcode/arm32_neon_vcnt_upgrade.ll
new file mode 100644
index 0000000..10b9284
--- /dev/null
+++ b/test/Bitcode/arm32_neon_vcnt_upgrade.ll
@@ -0,0 +1,21 @@
+; RUN: llvm-as < %s | llvm-dis | FileCheck %s
+; Tests vclz and vcnt
+
+define <4 x i16> @vclz16(<4 x i16>* %A) nounwind {
+;CHECK: @vclz16
+        %tmp1 = load <4 x i16>* %A
+        %tmp2 = call <4 x i16> @llvm.arm.neon.vclz.v4i16(<4 x i16> %tmp1)
+;CHECK: {{call.*@llvm.ctlz.v4i16\(<4 x i16>.*, i1 false}}
+        ret <4 x i16> %tmp2
+}
+
+define <8 x i8> @vcnt8(<8 x i8>* %A) nounwind {
+;CHECK: @vcnt8
+        %tmp1 = load <8 x i8>* %A
+        %tmp2 = call <8 x i8> @llvm.arm.neon.vcnt.v8i8(<8 x i8> %tmp1)
+;CHECK: call <8 x i8> @llvm.ctpop.v8i8(<8 x i8>
+        ret <8 x i8> %tmp2
+}
+
+declare <4 x i16>  @llvm.arm.neon.vclz.v4i16(<4 x i16>) nounwind readnone
+declare <8 x i8>  @llvm.arm.neon.vcnt.v8i8(<8 x i8>) nounwind readnone
diff --git a/test/Bitcode/attributes.ll b/test/Bitcode/attributes.ll
new file mode 100644
index 0000000..502e967
--- /dev/null
+++ b/test/Bitcode/attributes.ll
@@ -0,0 +1,164 @@
+; RUN: llvm-as < %s | llvm-dis | FileCheck %s
+; PR12696
+
+define void @f1(i8 zeroext)
+; CHECK: define void @f1(i8 zeroext)
+{
+        ret void;
+}
+
+define void @f2(i8 signext)
+; CHECK: define void @f2(i8 signext)
+{
+        ret void;
+}
+
+define void @f3() noreturn
+; CHECK: define void @f3() noreturn
+{
+        ret void;
+}
+
+define void @f4(i8 inreg)
+; CHECK: define void @f4(i8 inreg)
+{
+        ret void;
+}
+
+define void @f5(i8* sret)
+; CHECK: define void @f5(i8* sret)
+{
+        ret void;
+}
+
+define void @f6() nounwind
+; CHECK: define void @f6() nounwind
+{
+        ret void;
+}
+
+define void @f7(i8* noalias)
+; CHECK: define void @f7(i8* noalias)
+{
+        ret void;
+}
+
+define void @f8(i8* byval)
+; CHECK: define void @f8(i8* byval)
+{
+        ret void;
+}
+
+define void @f9(i8* nest)
+; CHECK: define void @f9(i8* nest)
+{
+        ret void;
+}
+
+define void @f10() readnone
+; CHECK: define void @f10() readnone
+{
+        ret void;
+}
+
+define void @f11() readonly
+; CHECK: define void @f11() readonly
+{
+        ret void;
+}
+
+define void @f12() noinline
+; CHECK: define void @f12() noinline
+{
+        ret void;
+}
+
+define void @f13() alwaysinline
+; CHECK: define void @f13() alwaysinline
+{
+        ret void;
+}
+
+define void @f14() optsize
+; CHECK: define void @f14() optsize
+{
+        ret void;
+}
+
+define void @f15() ssp
+; CHECK: define void @f15() ssp
+{
+        ret void;
+}
+
+define void @f16() sspreq
+; CHECK: define void @f16() sspreq
+{
+        ret void;
+}
+
+define void @f17(i8 align 4)
+; CHECK: define void @f17(i8 align 4)
+{
+        ret void;
+}
+
+define void @f18(i8* nocapture)
+; CHECK: define void @f18(i8* nocapture)
+{
+        ret void;
+}
+
+define void @f19() noredzone
+; CHECK: define void @f19() noredzone
+{
+        ret void;
+}
+
+define void @f20() noimplicitfloat
+; CHECK: define void @f20() noimplicitfloat
+{
+        ret void;
+}
+
+define void @f21() naked
+; CHECK: define void @f21() naked
+{
+        ret void;
+}
+
+define void @f22() inlinehint
+; CHECK: define void @f22() inlinehint
+{
+        ret void;
+}
+
+define void @f23() alignstack(4)
+; CHECK: define void @f23() alignstack(4)
+{
+        ret void;
+}
+
+define void @f24() returns_twice
+; CHECK: define void @f24() returns_twice
+{
+        ret void;
+}
+
+define void @f25() uwtable
+; CHECK: define void @f25() uwtable
+{
+        ret void;
+}
+
+define void @f26() nonlazybind
+; CHECK: define void @f26() nonlazybind
+{
+        ret void;
+}
+
+define void @f27() address_safety
+; CHECK: define void @f27() address_safety
+{
+        ret void;
+}
diff --git a/test/Bitcode/null-type.ll b/test/Bitcode/null-type.ll
index b972753..8502b0d 100644
--- a/test/Bitcode/null-type.ll
+++ b/test/Bitcode/null-type.ll
@@ -1,4 +1,5 @@
-; RUN: not llvm-dis < %s.bc > /dev/null |& FileCheck %s
+; RUN: not llvm-dis < %s.bc > /dev/null 2> %t
+; RUN: FileCheck %s < %t
 ; PR8494
 
 ; CHECK: Invalid MODULE_CODE_FUNCTION record
diff --git a/test/Bitcode/ptest-new.ll b/test/Bitcode/ptest-new.ll
new file mode 100644
index 0000000..276fb7a
--- /dev/null
+++ b/test/Bitcode/ptest-new.ll
@@ -0,0 +1,22 @@
+; RUN: llvm-as < %s | llvm-dis | FileCheck %s
+
+define i32 @foo(<2 x i64> %bar) nounwind {
+entry:
+; CHECK: call i32 @llvm.x86.sse41.ptestc(<2 x i64>
+ %res1 = call i32 @llvm.x86.sse41.ptestc(<2 x i64> %bar, <2 x i64> %bar)
+; CHECK: call i32 @llvm.x86.sse41.ptestz(<2 x i64>
+ %res2 = call i32 @llvm.x86.sse41.ptestz(<2 x i64> %bar, <2 x i64> %bar)
+; CHECK: call i32 @llvm.x86.sse41.ptestnzc(<2 x i64>
+ %res3 = call i32 @llvm.x86.sse41.ptestnzc(<2 x i64> %bar, <2 x i64> %bar)
+ %add1 = add i32 %res1, %res2
+ %add2 = add i32 %add1, %res2
+ ret i32 %add2
+}
+
+; CHECK: declare i32 @llvm.x86.sse41.ptestc(<2 x i64>, <2 x i64>) nounwind readnone
+; CHECK: declare i32 @llvm.x86.sse41.ptestz(<2 x i64>, <2 x i64>) nounwind readnone
+; CHECK: declare i32 @llvm.x86.sse41.ptestnzc(<2 x i64>, <2 x i64>) nounwind readnone
+
+declare i32 @llvm.x86.sse41.ptestc(<2 x i64>, <2 x i64>) nounwind readnone
+declare i32 @llvm.x86.sse41.ptestz(<2 x i64>, <2 x i64>) nounwind readnone
+declare i32 @llvm.x86.sse41.ptestnzc(<2 x i64>, <2 x i64>) nounwind readnone
diff --git a/test/Bitcode/ptest-old.ll b/test/Bitcode/ptest-old.ll
new file mode 100644
index 0000000..fc6ed8e
--- /dev/null
+++ b/test/Bitcode/ptest-old.ll
@@ -0,0 +1,22 @@
+; RUN: llvm-as < %s | llvm-dis | FileCheck %s
+
+define i32 @foo(<4 x float> %bar) nounwind {
+entry:
+; CHECK: call i32 @llvm.x86.sse41.ptestc(<2 x i64>
+ %res1 = call i32 @llvm.x86.sse41.ptestc(<4 x float> %bar, <4 x float> %bar)
+; CHECK: call i32 @llvm.x86.sse41.ptestz(<2 x i64> 
+ %res2 = call i32 @llvm.x86.sse41.ptestz(<4 x float> %bar, <4 x float> %bar)
+; CHECK: call i32 @llvm.x86.sse41.ptestnzc(<2 x i64>
+ %res3 = call i32 @llvm.x86.sse41.ptestnzc(<4 x float> %bar, <4 x float> %bar)
+ %add1 = add i32 %res1, %res2
+ %add2 = add i32 %add1, %res2
+ ret i32 %add2
+}
+
+; CHECK: declare i32 @llvm.x86.sse41.ptestc(<2 x i64>, <2 x i64>) nounwind readnone
+; CHECK: declare i32 @llvm.x86.sse41.ptestz(<2 x i64>, <2 x i64>) nounwind readnone
+; CHECK: declare i32 @llvm.x86.sse41.ptestnzc(<2 x i64>, <2 x i64>) nounwind readnone
+
+declare i32 @llvm.x86.sse41.ptestc(<4 x float>, <4 x float>) nounwind readnone
+declare i32 @llvm.x86.sse41.ptestz(<4 x float>, <4 x float>) nounwind readnone
+declare i32 @llvm.x86.sse41.ptestnzc(<4 x float>, <4 x float>) nounwind readnone