Move SWTCH_OPTIM_STATS related code out of cpufunc.h. (This sort of stat

gathering is not an x86 cpu feature)

7 files changed, 21 insertions, 29 deletions

diff --git a/sys/amd64/amd64/cpu_switch.S b/sys/amd64/amd64/cpu_switch.S
index a984623..57ba94b 100644
--- a/sys/amd64/amd64/cpu_switch.S
+++ b/sys/amd64/amd64/cpu_switch.S
@@ -55,7 +55,7 @@
 
 	.globl	panic
 
-#if defined(SWTCH_OPTIM_STATS)
+#ifdef SWTCH_OPTIM_STATS
 	.globl	swtch_optim_stats, tlb_flush_count
 swtch_optim_stats:	.long	0		/* number of _swtch_optims */
 tlb_flush_count:	.long	0
@@ -173,7 +173,7 @@ sw1b:
 	movl	%eax,%ecx
 	movl	TD_PCB(%ecx),%edx
 
-#if defined(SWTCH_OPTIM_STATS)
+#ifdef SWTCH_OPTIM_STATS
 	incl	swtch_optim_stats
 #endif
 
@@ -181,7 +181,7 @@ sw1b:
 	movl	%cr3,%ebx			/* The same address space? */
 	cmpl	PCB_CR3(%edx),%ebx
 	je	4f				/* Yes, skip all that cruft */
-#if defined(SWTCH_OPTIM_STATS)
+#ifdef SWTCH_OPTIM_STATS
 	decl	swtch_optim_stats
 	incl	tlb_flush_count
 #endif
diff --git a/sys/amd64/amd64/pmap.c b/sys/amd64/amd64/pmap.c
index d3f76db..13c3c7d 100644
--- a/sys/amd64/amd64/pmap.c
+++ b/sys/amd64/amd64/pmap.c
@@ -672,6 +672,9 @@ pmap_invalidate_all(pmap_t pmap)
 	u_int cpumask;
 	u_int other_cpus;
 
+#ifdef SWTCH_OPTIM_STATS
+	tlb_flush_count++;
+#endif
 	critical_enter();
 	/*
 	 * We need to disable interrupt preemption but MUST NOT have
@@ -3385,9 +3388,6 @@ pmap_activate(struct thread *td)
 #else
 	pmap->pm_active |= 1;
 #endif
-#if defined(SWTCH_OPTIM_STATS)
-	tlb_flush_count++;
-#endif
 	cr3 = vtophys(pmap->pm_pdir);
 	/* XXXKSE this is wrong.
 	 * pmap_activate is for the current thread on the current cpu
@@ -3402,6 +3402,9 @@ pmap_activate(struct thread *td)
 		td->td_pcb->pcb_cr3 = cr3;
 	}
 	load_cr3(cr3);
+#ifdef SWTCH_OPTIM_STATS
+	tlb_flush_count++;
+#endif
 }
 
 vm_offset_t
diff --git a/sys/amd64/amd64/swtch.s b/sys/amd64/amd64/swtch.s
index a984623..57ba94b 100644
--- a/sys/amd64/amd64/swtch.s
+++ b/sys/amd64/amd64/swtch.s
@@ -55,7 +55,7 @@
 
 	.globl	panic
 
-#if defined(SWTCH_OPTIM_STATS)
+#ifdef SWTCH_OPTIM_STATS
 	.globl	swtch_optim_stats, tlb_flush_count
 swtch_optim_stats:	.long	0		/* number of _swtch_optims */
 tlb_flush_count:	.long	0
@@ -173,7 +173,7 @@ sw1b:
 	movl	%eax,%ecx
 	movl	TD_PCB(%ecx),%edx
 
-#if defined(SWTCH_OPTIM_STATS)
+#ifdef SWTCH_OPTIM_STATS
 	incl	swtch_optim_stats
 #endif
 
@@ -181,7 +181,7 @@ sw1b:
 	movl	%cr3,%ebx			/* The same address space? */
 	cmpl	PCB_CR3(%edx),%ebx
 	je	4f				/* Yes, skip all that cruft */
-#if defined(SWTCH_OPTIM_STATS)
+#ifdef SWTCH_OPTIM_STATS
 	decl	swtch_optim_stats
 	incl	tlb_flush_count
 #endif
diff --git a/sys/amd64/include/cpufunc.h b/sys/amd64/include/cpufunc.h
index 1dacf54..b074c64 100644
--- a/sys/amd64/include/cpufunc.h
+++ b/sys/amd64/include/cpufunc.h
@@ -58,10 +58,6 @@ __BEGIN_DECLS
 
 #ifdef	__GNUC__
 
-#ifdef SWTCH_OPTIM_STATS
-extern	int	tlb_flush_count;	/* XXX */
-#endif
-
 static __inline void
 breakpoint(void)
 {
@@ -391,9 +387,6 @@ load_cr3(u_int data)
 {
 
 	__asm __volatile("movl %0,%%cr3" : : "r" (data) : "memory");
-#if defined(SWTCH_OPTIM_STATS)
-	++tlb_flush_count;
-#endif
 }
 
 static __inline u_int
diff --git a/sys/i386/i386/pmap.c b/sys/i386/i386/pmap.c
index d3f76db..13c3c7d 100644
--- a/sys/i386/i386/pmap.c
+++ b/sys/i386/i386/pmap.c
@@ -672,6 +672,9 @@ pmap_invalidate_all(pmap_t pmap)
 	u_int cpumask;
 	u_int other_cpus;
 
+#ifdef SWTCH_OPTIM_STATS
+	tlb_flush_count++;
+#endif
 	critical_enter();
 	/*
 	 * We need to disable interrupt preemption but MUST NOT have
@@ -3385,9 +3388,6 @@ pmap_activate(struct thread *td)
 #else
 	pmap->pm_active |= 1;
 #endif
-#if defined(SWTCH_OPTIM_STATS)
-	tlb_flush_count++;
-#endif
 	cr3 = vtophys(pmap->pm_pdir);
 	/* XXXKSE this is wrong.
 	 * pmap_activate is for the current thread on the current cpu
@@ -3402,6 +3402,9 @@ pmap_activate(struct thread *td)
 		td->td_pcb->pcb_cr3 = cr3;
 	}
 	load_cr3(cr3);
+#ifdef SWTCH_OPTIM_STATS
+	tlb_flush_count++;
+#endif
 }
 
 vm_offset_t
diff --git a/sys/i386/i386/swtch.s b/sys/i386/i386/swtch.s
index a984623..57ba94b 100644
--- a/sys/i386/i386/swtch.s
+++ b/sys/i386/i386/swtch.s
@@ -55,7 +55,7 @@
 
 	.globl	panic
 
-#if defined(SWTCH_OPTIM_STATS)
+#ifdef SWTCH_OPTIM_STATS
 	.globl	swtch_optim_stats, tlb_flush_count
 swtch_optim_stats:	.long	0		/* number of _swtch_optims */
 tlb_flush_count:	.long	0
@@ -173,7 +173,7 @@ sw1b:
 	movl	%eax,%ecx
 	movl	TD_PCB(%ecx),%edx
 
-#if defined(SWTCH_OPTIM_STATS)
+#ifdef SWTCH_OPTIM_STATS
 	incl	swtch_optim_stats
 #endif
 
@@ -181,7 +181,7 @@ sw1b:
 	movl	%cr3,%ebx			/* The same address space? */
 	cmpl	PCB_CR3(%edx),%ebx
 	je	4f				/* Yes, skip all that cruft */
-#if defined(SWTCH_OPTIM_STATS)
+#ifdef SWTCH_OPTIM_STATS
 	decl	swtch_optim_stats
 	incl	tlb_flush_count
 #endif
diff --git a/sys/i386/include/cpufunc.h b/sys/i386/include/cpufunc.h
index 1dacf54..b074c64 100644
--- a/sys/i386/include/cpufunc.h
+++ b/sys/i386/include/cpufunc.h
@@ -58,10 +58,6 @@ __BEGIN_DECLS
 
 #ifdef	__GNUC__
 
-#ifdef SWTCH_OPTIM_STATS
-extern	int	tlb_flush_count;	/* XXX */
-#endif
-
 static __inline void
 breakpoint(void)
 {
@@ -391,9 +387,6 @@ load_cr3(u_int data)
 {
 
 	__asm __volatile("movl %0,%%cr3" : : "r" (data) : "memory");
-#if defined(SWTCH_OPTIM_STATS)
-	++tlb_flush_count;
-#endif
 }
 
 static __inline u_int