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authordfr <dfr@FreeBSD.org>1999-05-30 11:02:17 +0000
committerdfr <dfr@FreeBSD.org>1999-05-30 11:02:17 +0000
commit3372b64e9da101fdd27f84e127b88dfc1c69edb6 (patch)
tree6f9756cfbc396db3e53829159e59e48cfaa96521 /sys
parent5e6c0b736334f0b218b5fe71b0edf37422a870d2 (diff)
downloadFreeBSD-src-3372b64e9da101fdd27f84e127b88dfc1c69edb6.zip
FreeBSD-src-3372b64e9da101fdd27f84e127b88dfc1c69edb6.tar.gz
* Add ivars for ISA pnp.
* Move isa_dma* declarations to isavar.h. * Add a method ISA_DELETE_RESOURCE() to the ISA interface. * Tidy up include protection defines.
Diffstat (limited to 'sys')
-rw-r--r--sys/isa/isa_common.c51
-rw-r--r--sys/isa/isa_common.h6
-rw-r--r--sys/isa/isa_if.m12
-rw-r--r--sys/isa/isareg.h8
-rw-r--r--sys/isa/isavar.h35
-rw-r--r--sys/isa/pnp.h308
6 files changed, 408 insertions, 12 deletions
diff --git a/sys/isa/isa_common.c b/sys/isa/isa_common.c
index 7b3b494..d2207ac 100644
--- a/sys/isa/isa_common.c
+++ b/sys/isa/isa_common.c
@@ -23,7 +23,7 @@
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*
- * $Id: isa_common.c,v 1.1 1999/05/22 15:18:23 dfr Exp $
+ * $Id: isa_common.c,v 1.2 1999/05/28 09:24:58 dfr Exp $
*/
/*
* Modifications for Intel architecture by Garrett A. Wollman.
@@ -279,8 +279,28 @@ isa_read_ivar(device_t bus, device_t dev, int index, uintptr_t * result)
case ISA_IVAR_FLAGS:
*result = idev->id_flags;
break;
+
+ case ISA_IVAR_VENDORID:
+ *result = idev->id_vendorid;
+ break;
+
+ case ISA_IVAR_SERIAL:
+ *result = idev->id_serial;
+ break;
+
+ case ISA_IVAR_LOGICALID:
+ *result = idev->id_logicalid;
+ break;
+
+ case ISA_IVAR_COMPATID:
+ *result = idev->id_compatid;
+ break;
+
+ default:
+ return ENOENT;
}
- return ENOENT;
+
+ return 0;
}
static int
@@ -307,9 +327,27 @@ isa_write_ivar(device_t bus, device_t dev,
case ISA_IVAR_FLAGS:
idev->id_flags = value;
break;
+
+ case ISA_IVAR_VENDORID:
+ idev->id_vendorid = value;
+ break;
+
+ case ISA_IVAR_SERIAL:
+ idev->id_serial = value;
+ break;
+
+ case ISA_IVAR_LOGICALID:
+ idev->id_logicalid = value;
+ break;
+
+ case ISA_IVAR_COMPATID:
+ idev->id_compatid = value;
+ break;
+
default:
return (ENOENT);
}
+
return (0);
}
@@ -349,6 +387,14 @@ isa_get_resource(device_t dev, device_t child, int type, int rid,
return 0;
}
+static void
+isa_delete_resource(device_t dev, device_t child, int type, int rid)
+{
+ struct isa_device* idev = DEVTOISA(child);
+ struct resource_list *rl = &idev->id_resources;
+ resource_list_delete(rl, type, rid);
+}
+
static device_method_t isa_methods[] = {
/* Device interface */
DEVMETHOD(device_probe, isa_probe),
@@ -373,6 +419,7 @@ static device_method_t isa_methods[] = {
/* ISA interface */
DEVMETHOD(isa_set_resource, isa_set_resource),
DEVMETHOD(isa_get_resource, isa_get_resource),
+ DEVMETHOD(isa_delete_resource, isa_delete_resource),
{ 0, 0 }
};
diff --git a/sys/isa/isa_common.h b/sys/isa/isa_common.h
index cb9f26c..8447992 100644
--- a/sys/isa/isa_common.h
+++ b/sys/isa/isa_common.h
@@ -23,7 +23,7 @@
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*
- * $Id$
+ * $Id: isa_common.h,v 1.1 1999/05/22 15:18:25 dfr Exp $
*/
/*
@@ -41,6 +41,10 @@ MALLOC_DECLARE(M_ISADEV);
struct isa_device {
struct resource_list id_resources;
int id_flags;
+ u_int32_t id_vendorid; /* pnp vendor id */
+ u_int32_t id_serial; /* pnp serial */
+ u_int32_t id_logicalid; /* pnp logical device id */
+ u_int32_t id_compatid; /* pnp compat device id */
};
#define DEVTOISA(dev) ((struct isa_device *) device_get_ivars(dev))
diff --git a/sys/isa/isa_if.m b/sys/isa/isa_if.m
index 32a54d7..72daf4a 100644
--- a/sys/isa/isa_if.m
+++ b/sys/isa/isa_if.m
@@ -23,7 +23,7 @@
# OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
# SUCH DAMAGE.
#
-# $Id: pci_if.m,v 1.1 1999/04/16 21:22:52 peter Exp $
+# $Id: isa_if.m,v 1.1 1999/05/22 15:18:26 dfr Exp $
#
INTERFACE isa;
@@ -53,3 +53,13 @@ METHOD int get_resource {
u_long *startp;
u_long *countp;
};
+
+#
+# Delete a resource.
+#
+METHOD void delete_resource {
+ device_t dev;
+ device_t child;
+ int type;
+ int rid;
+};
diff --git a/sys/isa/isareg.h b/sys/isa/isareg.h
index 644755a..e15f7cd 100644
--- a/sys/isa/isareg.h
+++ b/sys/isa/isareg.h
@@ -34,15 +34,15 @@
* SUCH DAMAGE.
*
* from: @(#)isa.h 5.7 (Berkeley) 5/9/91
- * $Id: isareg.h,v 1.1 1998/08/06 08:49:09 dfr Exp $
+ * $Id: isareg.h,v 1.2 1999/01/06 05:49:30 yokota Exp $
*/
#ifdef PC98
#error isa.h is included from PC-9801 source
#endif
-#ifndef _I386_ISA_ISA_H_
-#define _I386_ISA_ISA_H_
+#ifndef _ISA_ISA_H_
+#define _ISA_ISA_H_
/* BEWARE: Included in both assembler and C code */
@@ -197,4 +197,4 @@
#define CYRIX_EMC 0xC0000000 /* Cyrix EMC */
#endif /* !COMPAQ_RAMRELOC */
-#endif /* !_I386_ISA_ISA_H_ */
+#endif /* !_ISA_ISA_H_ */
diff --git a/sys/isa/isavar.h b/sys/isa/isavar.h
index 7f39773..2f63e62 100644
--- a/sys/isa/isavar.h
+++ b/sys/isa/isavar.h
@@ -23,10 +23,16 @@
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*
- * $Id: isavar.h,v 1.7 1999/05/22 15:18:28 dfr Exp $
+ * $Id: isavar.h,v 1.8 1999/05/28 09:25:02 dfr Exp $
*/
+#ifndef _ISA_ISAVAR_H_
+#define _ISA_ISAVAR_H_
+
#include "isa_if.h"
+#include <isa/pnp.h>
+
+#ifdef KERNEL
/*
* ISA devices are partially ordered to ensure that devices which are
@@ -39,8 +45,8 @@
#define ISA_ORDER_SPECULATIVE 1 /* legacy non-sensitive hardware */
#define ISA_ORDER_PNP 2 /* plug-and-play hardware */
-#define ISA_NPORT_IVARS 2
-#define ISA_NMEM_IVARS 2
+#define ISA_NPORT_IVARS 8
+#define ISA_NMEM_IVARS 4
#define ISA_NIRQ_IVARS 2
#define ISA_NDRQ_IVARS 2
@@ -63,7 +69,11 @@ enum isa_device_ivars {
ISA_IVAR_IRQ_1,
ISA_IVAR_DRQ,
ISA_IVAR_DRQ_0 = ISA_IVAR_DRQ,
- ISA_IVAR_DRQ_1
+ ISA_IVAR_DRQ_1,
+ ISA_IVAR_VENDORID,
+ ISA_IVAR_SERIAL,
+ ISA_IVAR_LOGICALID,
+ ISA_IVAR_COMPATID
};
extern intrmask_t isa_irq_pending(void);
@@ -97,3 +107,20 @@ ISA_ACCESSOR(drq, DRQ, int)
ISA_ACCESSOR(maddr, MADDR, int)
ISA_ACCESSOR(msize, MSIZE, int)
ISA_ACCESSOR(flags, FLAGS, int)
+ISA_ACCESSOR(vendorid, VENDORID, int)
+ISA_ACCESSOR(serial, SERIAL, int)
+ISA_ACCESSOR(logicalid, LOGICALID, int)
+ISA_ACCESSOR(compatid, COMPATID, int)
+
+void isa_dmacascade __P((int chan));
+void isa_dmadone __P((int flags, caddr_t addr, int nbytes, int chan));
+void isa_dmainit __P((int chan, u_int bouncebufsize));
+void isa_dmastart __P((int flags, caddr_t addr, u_int nbytes, int chan));
+int isa_dma_acquire __P((int chan));
+void isa_dma_release __P((int chan));
+int isa_dmastatus __P((int chan));
+int isa_dmastop __P((int chan));
+
+#endif /* KERNEL */
+
+#endif /* !_ISA_ISAVAR_H_ */
diff --git a/sys/isa/pnp.h b/sys/isa/pnp.h
new file mode 100644
index 0000000..049eb7b
--- /dev/null
+++ b/sys/isa/pnp.h
@@ -0,0 +1,308 @@
+/*
+ * Copyright (c) 1996, Sujal M. Patel
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. All advertising materials mentioning features or use of this software
+ * must display the following acknowledgement:
+ * This product includes software developed by Sujal M. Patel
+ * 4. Neither the name of the author nor the names of any co-contributors
+ * may be used to endorse or promote products derived from this software
+ * without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * $Id$
+ * from: pnp.h,v 1.7 1998/09/13 22:15:44 eivind Exp
+ */
+
+#ifndef _ISA_PNP_H_
+#define _ISA_PNP_H_
+
+/* Maximum Number of PnP Devices. 8 should be plenty */
+#define MAX_PNP_CARDS 8
+/*
+ * the following is the maximum number of PnP Logical devices that
+ * userconfig can handle.
+ */
+#define MAX_PNP_LDN 20
+
+/* Static ports to access PnP state machine */
+#if defined(PC98) && defined(KERNEL)
+/* pnp.h is included from pnpinfo.c. */
+#define _PNP_ADDRESS 0x259
+#define _PNP_WRITE_DATA 0xa59
+#else
+#define _PNP_ADDRESS 0x279
+#define _PNP_WRITE_DATA 0xa79
+#endif
+
+/* PnP Registers. Write to ADDRESS and then use WRITE/READ_DATA */
+#define SET_RD_DATA 0x00
+ /***
+ Writing to this location modifies the address of the port used for
+ reading from the Plug and Play ISA cards. Bits[7:0] become I/O
+ read port address bits[9:2]. Reads from this register are ignored.
+ ***/
+
+#define SERIAL_ISOLATION 0x01
+ /***
+ A read to this register causes a Plug and Play cards in the Isolation
+ state to compare one bit of the boards ID.
+ This register is read only.
+ ***/
+
+#define CONFIG_CONTROL 0x02
+ /***
+ Bit[2] Reset CSN to 0
+ Bit[1] Return to the Wait for Key state
+ Bit[0] Reset all logical devices and restore configuration
+ registers to their power-up values.
+
+ A write to bit[0] of this register performs a reset function on
+ all logical devices. This resets the contents of configuration
+ registers to their default state. All card's logical devices
+ enter their default state and the CSN is preserved.
+
+ A write to bit[1] of this register causes all cards to enter the
+ Wait for Key state but all CSNs are preserved and logical devices
+ are not affected.
+
+ A write to bit[2] of this register causes all cards to reset their
+ CSN to zero .
+
+ This register is write-only. The values are not sticky, that is,
+ hardware will automatically clear them and there is no need for
+ software to clear the bits.
+ ***/
+
+#define WAKE 0x03
+ /***
+ A write to this port will cause all cards that have a CSN that
+ matches the write data[7:0] to go from the Sleep state to the either
+ the Isolation state if the write data for this command is zero or
+ the Config state if the write data is not zero. Additionally, the
+ pointer to the byte-serial device is reset. This register is
+ writeonly.
+ ***/
+
+#define RESOURCE_DATA 0x04
+ /***
+ A read from this address reads the next byte of resource information.
+ The Status register must be polled until bit[0] is set before this
+ register may be read. This register is read only.
+ ***/
+
+#define STATUS 0x05
+ /***
+ Bit[0] when set indicates it is okay to read the next data byte
+ from the Resource Data register. This register is readonly.
+ ***/
+
+#define SET_CSN 0x06
+ /***
+ A write to this port sets a card's CSN. The CSN is a value uniquely
+ assigned to each ISA card after the serial identification process
+ so that each card may be individually selected during a Wake[CSN]
+ command. This register is read/write.
+ ***/
+
+#define SET_LDN 0x07
+ /***
+ Selects the current logical device. All reads and writes of memory,
+ I/O, interrupt and DMA configuration information access the registers
+ of the logical device written here. In addition, the I/O Range
+ Check and Activate commands operate only on the selected logical
+ device. This register is read/write. If a card has only 1 logical
+ device, this location should be a read-only value of 0x00.
+ ***/
+
+/*** addresses 0x08 - 0x1F Card Level Reserved for future use ***/
+/*** addresses 0x20 - 0x2F Card Level, Vendor Defined ***/
+
+#define ACTIVATE 0x30
+ /***
+ For each logical device there is one activate register that controls
+ whether or not the logical device is active on the ISA bus. Bit[0],
+ if set, activates the logical device. Bits[7:1] are reserved and
+ must return 0 on reads. This is a read/write register. Before a
+ logical device is activated, I/O range check must be disabled.
+ ***/
+
+#define IO_RANGE_CHECK 0x31
+ /***
+ This register is used to perform a conflict check on the I/O port
+ range programmed for use by a logical device.
+
+ Bit[7:2] Reserved and must return 0 on reads
+ Bit[1] Enable I/O Range check, if set then I/O Range Check
+ is enabled. I/O range check is only valid when the logical
+ device is inactive.
+
+ Bit[0], if set, forces the logical device to respond to I/O reads
+ of the logical device's assigned I/O range with a 0x55 when I/O
+ range check is in operation. If clear, the logical device drives
+ 0xAA. This register is read/write.
+ ***/
+
+/*** addr 0x32 - 0x37 Logical Device Control Reserved for future use ***/
+/*** addr 0x38 - 0x3F Logical Device Control Vendor Define ***/
+
+#define MEM_CONFIG 0x40
+ /***
+ Four memory resource registers per range, four ranges.
+ Fill with 0 if no ranges are enabled.
+
+ Offset 0: RW Memory base address bits[23:16]
+ Offset 1: RW Memory base address bits[15:8]
+ Offset 2: Memory control
+ Bit[1] specifies 8/16-bit control. This bit is set to indicate
+ 16-bit memory, and cleared to indicate 8-bit memory.
+ Bit[0], if cleared, indicates the next field can be used as a range
+ length for decode (implies range length and base alignment of memory
+ descriptor are equal).
+ Bit[0], if set, indicates the next field is the upper limit for
+ the address. - - Bit[0] is read-only.
+ Offset 3: RW upper limit or range len, bits[23:16]
+ Offset 4: RW upper limit or range len, bits[15:8]
+ Offset 5-Offset 7: filler, unused.
+ ***/
+
+#define IO_CONFIG_BASE 0x60
+ /***
+ Eight ranges, two bytes per range.
+ Offset 0: I/O port base address bits[15:8]
+ Offset 1: I/O port base address bits[7:0]
+ ***/
+
+#define IRQ_CONFIG 0x70
+ /***
+ Two entries, two bytes per entry.
+ Offset 0: RW interrupt level (1..15, 0=unused).
+ Offset 1: Bit[1]: level(1:hi, 0:low),
+ Bit[0]: type (1:level, 0:edge)
+ byte 1 can be readonly if 1 type of int is used.
+ ***/
+
+#define DRQ_CONFIG 0x74
+ /***
+ Two entries, one byte per entry. Bits[2:0] select
+ which DMA channel is in use for DMA 0. Zero selects DMA channel
+ 0, seven selects DMA channel 7. DMA channel 4, the cascade channel
+ is used to indicate no DMA channel is active.
+ ***/
+
+/*** 32-bit memory accesses are at 0x76 ***/
+
+/* Macros to parse Resource IDs */
+#define PNP_RES_TYPE(a) (a >> 7)
+#define PNP_SRES_NUM(a) (a >> 3)
+#define PNP_SRES_LEN(a) (a & 0x07)
+#define PNP_LRES_NUM(a) (a & 0x7f)
+
+/* Small Resource Item names */
+#define PNP_VERSION 0x1
+#define LOG_DEVICE_ID 0x2
+#define COMP_DEVICE_ID 0x3
+#define IRQ_FORMAT 0x4
+#define DMA_FORMAT 0x5
+#define START_DEPEND_FUNC 0x6
+#define END_DEPEND_FUNC 0x7
+#define IO_PORT_DESC 0x8
+#define FIXED_IO_PORT_DESC 0x9
+#define SM_RES_RESERVED 0xa-0xd
+#define SM_VENDOR_DEFINED 0xe
+#define END_TAG 0xf
+
+/* Large Resource Item names */
+#define MEMORY_RANGE_DESC 0x1
+#define ID_STRING_ANSI 0x2
+#define ID_STRING_UNICODE 0x3
+#define LG_VENDOR_DEFINED 0x4
+#define _32BIT_MEM_RANGE_DESC 0x5
+#define _32BIT_FIXED_LOC_DESC 0x6
+#define LG_RES_RESERVED 0x7-0x7f
+
+/*
+ * pnp_cinfo contains Configuration Information. They are used
+ * to communicate to the device driver the actual configuration
+ * of the device, and also by the userconfig menu to let the
+ * operating system override any configuration set by the bios.
+ *
+ */
+struct pnp_cinfo {
+ u_int vendor_id; /* board id */
+ u_int serial; /* Board's Serial Number */
+ u_long flags; /* OS-reserved flags */
+ u_char csn; /* assigned Card Select Number */
+ u_char ldn; /* Logical Device Number */
+ u_char enable; /* pnp enable */
+ u_char override; /* override bios parms (in userconfig) */
+ u_char irq[2]; /* IRQ Number */
+ u_char irq_type[2]; /* IRQ Type */
+ u_char drq[2];
+ u_short port[8]; /* The Base Address of the Port */
+ struct {
+ u_int32_t base; /* Memory Base Address */
+ int control; /* Memory Control Register */
+ u_int32_t range; /* Memory Range *OR* Upper Limit */
+ } mem[4];
+};
+
+#ifdef KERNEL
+
+/*
+ * Used by userconfig
+ */
+extern struct pnp_cinfo pnp_ldn_overrides[MAX_PNP_LDN];
+
+/*
+ * The following definitions are for use in drivers
+ */
+extern struct linker_set pnpdevice_set;
+
+typedef struct _pnpid_t {
+ u_int32_t vend_id; /* Not anly a Vendor ID, also a Compatible Device ID */
+ char *id_str;
+} pnpid_t;
+
+void pnp_write(int d, u_char r); /* used by Luigi's sound driver */
+u_char pnp_read(int d); /* currently unused, but who knows... */
+int enable_pnp_card(void);
+
+#define PNP_HEXTONUM(c) ((c) >= 'a' \
+ ? (c) - 'a' + 10 \
+ : ((c) >= 'A' \
+ ? (c) - 'A' + 10 \
+ : (c) - '0'))
+
+#define PNP_EISAID(s) \
+ ((((s[0] - '@') & 0x1f) << 2) \
+ | (((s[1] - '@') & 0x18) >> 3) \
+ | (((s[1] - '@') & 0x07) << 13) \
+ | (((s[2] - '@') & 0x1f) << 8) \
+ | (PNP_HEXTONUM(s[4]) << 16) \
+ | (PNP_HEXTONUM(s[3]) << 20) \
+ | (PNP_HEXTONUM(s[6]) << 24) \
+ | (PNP_HEXTONUM(s[5]) << 28))
+
+#endif /* KERNEL */
+
+#endif /* !_ISA_PNP_H_ */
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