diff options
author | jchandra <jchandra@FreeBSD.org> | 2010-10-05 07:41:59 +0000 |
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committer | jchandra <jchandra@FreeBSD.org> | 2010-10-05 07:41:59 +0000 |
commit | e1cc06374b84d53c44a5d2c5832466696d8aa196 (patch) | |
tree | f6357f2af6651487220b9ecaa81269e47d393e38 /sys | |
parent | aeb85210beb87c1ef182bc1ae9ddb7ccf2695bef (diff) | |
download | FreeBSD-src-e1cc06374b84d53c44a5d2c5832466696d8aa196.zip FreeBSD-src-e1cc06374b84d53c44a5d2c5832466696d8aa196.tar.gz |
Network driver support for more XLR/XLS chip versions.
Obtained from: Sriram Gorti (srgorti at netlogicmicro dot com)
Diffstat (limited to 'sys')
-rw-r--r-- | sys/mips/rmi/board.c | 147 |
1 files changed, 129 insertions, 18 deletions
diff --git a/sys/mips/rmi/board.c b/sys/mips/rmi/board.c index 7b9f62f..3bee863 100644 --- a/sys/mips/rmi/board.c +++ b/sys/mips/rmi/board.c @@ -62,6 +62,88 @@ xlr_pcmcia_present(void) } static void +xlr_chip_specific_overrides(struct xlr_board_info* board) +{ + struct xlr_gmac_block_t *blk0, *blk1, *blk2; + uint32_t chipid; + uint32_t revision; + + blk0 = &board->gmac_block[0]; + blk1 = &board->gmac_block[1]; + blk2 = &board->gmac_block[2]; + + chipid = xlr_processor_id(); + revision = xlr_revision(); + + if (revision == 0x04) { /* B2 */ + switch (chipid) { + case 0x07: /* XLR 508 */ + case 0x08: /* XLR 516 */ + case 0x09: /* XLR 532 */ + /* NA[12] not available */ + memset(blk1, 0, sizeof(*blk1)); + memset(blk2, 0, sizeof(*blk2)); + break; + case 0x06: /* XLR 308 */ + /* NA0 has 3 ports */ + blk0->gmac_port[3].valid = 0; + blk0->num_ports--; + /* NA[12] not available */ + memset(blk1, 0, sizeof(*blk1)); + memset(blk2, 0, sizeof(*blk2)); + break; + default: + break; + } + } else if (revision == 0x91) { /* C4 */ + switch (chipid) { + case 0x0B: /* XLR 508 */ + case 0x0A: /* XLR 516 */ + case 0x08: /* XLR 532 */ + /* NA[12] not available */ + memset(blk1, 0, sizeof(*blk1)); + memset(blk2, 0, sizeof(*blk2)); + break; + case 0x0F: /* XLR 308 */ + /* NA0 has 3 ports */ + blk0->gmac_port[3].valid = 0; + blk0->num_ports--; + /* NA[12] not available */ + memset(blk1, 0, sizeof(*blk1)); + memset(blk2, 0, sizeof(*blk2)); + break; + default: + break; + } + } else { /* other pre-production silicon */ + switch (chipid) { + /* XLR 5xx */ + case 0x0B: + case 0x0A: + case 0x07: + case 0x08: + case 0x09: + /* NA[12] not available */ + memset(blk1, 0, sizeof(*blk1)); + memset(blk2, 0, sizeof(*blk2)); + break; + /* XLR 3xx */ + case 0x0F: + case 0x06: + /* NA0 has 3 ports */ + blk0->gmac_port[3].valid = 0; + blk0->num_ports--; + /* NA[12] not available */ + memset(blk1, 0, sizeof(*blk1)); + memset(blk2, 0, sizeof(*blk2)); + break; + default: + break; + } + } +} + +static void xlr_board_specific_overrides(struct xlr_board_info* board) { struct xlr_gmac_block_t *blk1, *blk2; @@ -116,6 +198,35 @@ quad1_xaui(void) } static void +xls_chip_specific_overrides(struct xlr_board_info* board) +{ + struct xlr_gmac_block_t *blk0, *blk1; + uint32_t chipid; + + blk0 = &board->gmac_block[0]; + blk1 = &board->gmac_block[1]; + chipid = xlr_processor_id(); + + switch (chipid) { + case 0x8E: /* XLS208 */ + case 0x8F: /* XLS204 */ + /* NA1 is not available */ + memset(blk1, 0, sizeof(*blk1)); + break; + case 0xCE: /* XLS108 */ + case 0xCF: /* XLS104 */ + /* NA0 has 3 ports */ + blk0->gmac_port[3].valid = 0; + blk0->num_ports--; + /* NA1 is not available */ + memset(blk1, 0, sizeof(*blk1)); + break; + default: + break; + } +} + +static void xls_board_specific_overrides(struct xlr_board_info* board) { struct xlr_gmac_block_t *blk0, *blk1; @@ -172,22 +283,15 @@ xls_board_specific_overrides(struct xlr_board_info* board) break; case RMI_XLR_BOARD_ARIZONA_VIII: - /* There is just one Octal PHY on the board and it is - * connected to the MII interface for NA Quad 0. */ - blk1->gmac_port[0].mii_addr = XLR_IO_GMAC_0_OFFSET; - blk1->gmac_port[1].mii_addr = XLR_IO_GMAC_0_OFFSET; - blk1->gmac_port[2].mii_addr = XLR_IO_GMAC_0_OFFSET; - blk1->gmac_port[3].mii_addr = XLR_IO_GMAC_0_OFFSET; - /* Board 8.3 (Lite) has XLS108 */ - if (xlr_boot1_info.board_minor_version == 3) { - /* NA0 has 3 ports */ - blk0->gmac_port[3].valid = 1; - blk0->num_ports--; - /* NA1 is completely disabled */ - blk1->enabled = 0; + if (blk1->enabled) { + /* There is just one Octal PHY on the board and it is + * connected to the MII interface for NA Quad 0. */ + blk1->gmac_port[0].mii_addr = XLR_IO_GMAC_0_OFFSET; + blk1->gmac_port[1].mii_addr = XLR_IO_GMAC_0_OFFSET; + blk1->gmac_port[2].mii_addr = XLR_IO_GMAC_0_OFFSET; + blk1->gmac_port[3].mii_addr = XLR_IO_GMAC_0_OFFSET; } - break; case RMI_XLR_BOARD_ARIZONA_XI: @@ -285,16 +389,20 @@ xlr_board_info_setup() * if (CPU is XLS) { * // initialize per XLS architecture * // default inits (per chip spec) + * // chip-specific overrides * // board-specific overrides * } else if (CPU is XLR) { * // initialize per XLR architecture * // default inits (per chip spec) + * // chip-specific overrides * // board-specific overrides * } * - * Within each CPU-specific initialization, all the default - * initializations are done first. This is followed up with - * board specific overrides. + * For each CPU family, all the default initializations + * are done for a fully-loaded device of that family. + * This configuration is then adjusted for the actual + * chip id. This is followed up with board specific + * overrides. */ /* start with a clean slate */ @@ -377,6 +485,7 @@ xlr_board_info_setup() /* ---------------- Network Acc 2 ---------------- */ xlr_board_info.gmac_block[2].enabled = 0; /* disabled on XLS */ + xls_chip_specific_overrides(&xlr_board_info); xls_board_specific_overrides(&xlr_board_info); } else { /* XLR */ @@ -456,7 +565,9 @@ xlr_board_info_setup() blk2->gmac_port[0].tx_bucket_id = blk2->station_txbase; blk2->gmac_port[0].mdint_id = 2; - /* Done with default setup. Now do board-specific tweaks. */ + /* Done with default setup. Now handle chip and board-specific + variations. */ + xlr_chip_specific_overrides(&xlr_board_info); xlr_board_specific_overrides(&xlr_board_info); } return 0; |