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authorhmp <hmp@FreeBSD.org>2003-05-30 20:40:33 +0000
committerhmp <hmp@FreeBSD.org>2003-05-30 20:40:33 +0000
commitd48f3818ad991429ac22904f641e2aaa48eeb89a (patch)
tree9a66557b1ba65bdc8038406307415ee4fdf97d21 /sys
parentc264d8171dad13e2bbd26da5482a9e13a7d71f94 (diff)
downloadFreeBSD-src-d48f3818ad991429ac22904f641e2aaa48eeb89a.zip
FreeBSD-src-d48f3818ad991429ac22904f641e2aaa48eeb89a.tar.gz
Rename BUS_DMAMEM_NOSYNC to BUS_DMA_COHERENT.
The current name is confusing, because it indicates to the client that a bus_dmamap_sync() operation is not necessary when the flag is specified, which is wrong. The main purpose of this flag is to hint the underlying architecture that DMA memory should be mapped in a coherent way, but the architecture can ignore it. But if the architecture does supports coherent mapping of memory, then it makes bus_dmamap_sync() calls cheap. This flag is the same as the one in NetBSD's Bus DMA. Reviewed by: gibbs, scottl, des (implicitly) Approved by: re@ (jhb)
Diffstat (limited to 'sys')
-rw-r--r--sys/alpha/include/bus.h2
-rw-r--r--sys/amd64/include/bus_dma.h2
-rw-r--r--sys/i386/include/bus_dma.h2
-rw-r--r--sys/i4b/layer1/itjc/i4b_itjc_pci.c4
-rw-r--r--sys/ia64/include/bus.h2
-rw-r--r--sys/sparc64/include/bus.h3
-rw-r--r--sys/sys/bus_dma.h2
7 files changed, 8 insertions, 9 deletions
diff --git a/sys/alpha/include/bus.h b/sys/alpha/include/bus.h
index 2d44ddf..76f6477 100644
--- a/sys/alpha/include/bus.h
+++ b/sys/alpha/include/bus.h
@@ -469,7 +469,7 @@ void busspace_generic_barrier(struct alpha_busspace *space,
#define BUS_DMA_WAITOK 0x00 /* safe to sleep (pseudo-flag) */
#define BUS_DMA_NOWAIT 0x01 /* not safe to sleep */
#define BUS_DMA_ALLOCNOW 0x02 /* perform resource allocation now */
-#define BUS_DMAMEM_NOSYNC 0x04 /* map memory to not require sync */
+#define BUS_DMA_COHERENT 0x04 /* hint: map memory in a coherent way */
#define BUS_DMA_ISA 0x10 /* map memory for ISA dma */
#define BUS_DMA_BUS2 0x20 /* placeholders for bus functions... */
#define BUS_DMA_BUS3 0x40
diff --git a/sys/amd64/include/bus_dma.h b/sys/amd64/include/bus_dma.h
index a74a942..6a434cf 100644
--- a/sys/amd64/include/bus_dma.h
+++ b/sys/amd64/include/bus_dma.h
@@ -78,7 +78,7 @@
#define BUS_DMA_WAITOK 0x00 /* safe to sleep (pseudo-flag) */
#define BUS_DMA_NOWAIT 0x01 /* not safe to sleep */
#define BUS_DMA_ALLOCNOW 0x02 /* perform resource allocation now */
-#define BUS_DMAMEM_NOSYNC 0x04 /* map memory to not require sync */
+#define BUS_DMA_COHERENT 0x04 /* hint map memory in a coherent way */
#define BUS_DMA_BUS1 0x10 /* placeholders for bus functions... */
#define BUS_DMA_BUS2 0x20
#define BUS_DMA_BUS3 0x40
diff --git a/sys/i386/include/bus_dma.h b/sys/i386/include/bus_dma.h
index 2a10d06..8a54fe3 100644
--- a/sys/i386/include/bus_dma.h
+++ b/sys/i386/include/bus_dma.h
@@ -78,7 +78,7 @@
#define BUS_DMA_WAITOK 0x00 /* safe to sleep (pseudo-flag) */
#define BUS_DMA_NOWAIT 0x01 /* not safe to sleep */
#define BUS_DMA_ALLOCNOW 0x02 /* perform resource allocation now */
-#define BUS_DMAMEM_NOSYNC 0x04 /* map memory to not require sync */
+#define BUS_DMA_COHERENT 0x04 /* hint: map memory in a coherent way */
#define BUS_DMA_BUS1 0x10 /* placeholders for bus functions... */
#define BUS_DMA_BUS2 0x20
#define BUS_DMA_BUS3 0x40
diff --git a/sys/i4b/layer1/itjc/i4b_itjc_pci.c b/sys/i4b/layer1/itjc/i4b_itjc_pci.c
index bdb512e..e1028fe 100644
--- a/sys/i4b/layer1/itjc/i4b_itjc_pci.c
+++ b/sys/i4b/layer1/itjc/i4b_itjc_pci.c
@@ -1607,7 +1607,7 @@ itjc_attach(device_t dev)
ITJC_DMA_POOL_BYTES, /* maxsize*/
1, /* nsegments*/
ITJC_DMA_POOL_BYTES, /* maxsegsz*/
- BUS_DMA_ALLOCNOW | BUS_DMAMEM_NOSYNC, /* flags*/
+ BUS_DMA_ALLOCNOW | BUS_DMA_COHERENT, /* flags*/
&ctx->tag);
if (error)
@@ -1621,7 +1621,7 @@ itjc_attach(device_t dev)
error = bus_dmamem_alloc(
ctx->tag, /* DMA tag */
(void **)&ctx->pool, /* KV addr of the allocated memory */
- BUS_DMA_NOWAIT | BUS_DMAMEM_NOSYNC, /* flags */
+ BUS_DMA_NOWAIT | BUS_DMA_COHERENT, /* flags */
&ctx->map); /* KV <-> PCI map */
if (error)
diff --git a/sys/ia64/include/bus.h b/sys/ia64/include/bus.h
index c060a4b..bc15d08 100644
--- a/sys/ia64/include/bus.h
+++ b/sys/ia64/include/bus.h
@@ -851,7 +851,7 @@ bus_space_copy_region_8(bus_space_tag_t bst, bus_space_handle_t bsh1,
#define BUS_DMA_WAITOK 0x00 /* safe to sleep (pseudo-flag) */
#define BUS_DMA_NOWAIT 0x01 /* not safe to sleep */
#define BUS_DMA_ALLOCNOW 0x02 /* perform resource allocation now */
-#define BUS_DMAMEM_NOSYNC 0x04 /* map memory to not require sync */
+#define BUS_DMA_COHERENT 0x04 /* hint: map memory in a coherent way */
#define BUS_DMA_ISA 0x10 /* map memory for ISA dma */
#define BUS_DMA_BUS2 0x20 /* placeholders for bus functions... */
#define BUS_DMA_BUS3 0x40
diff --git a/sys/sparc64/include/bus.h b/sys/sparc64/include/bus.h
index 39a048c..d2b36a0 100644
--- a/sys/sparc64/include/bus.h
+++ b/sys/sparc64/include/bus.h
@@ -881,7 +881,7 @@ memsetw(void *d, int val, size_t size)
#define BUS_DMA_WAITOK 0x000 /* safe to sleep (pseudo-flag) */
#define BUS_DMA_NOWAIT 0x001 /* not safe to sleep */
#define BUS_DMA_ALLOCNOW 0x002 /* perform resource allocation now */
-#define BUS_DMAMEM_NOSYNC 0x004 /* map memory to not require sync */
+#define BUS_DMA_COHERENT 0x004 /* hint: map memory in a coherent way */
#define BUS_DMA_NOWRITE 0x008
#define BUS_DMA_BUS1 0x010
#define BUS_DMA_BUS2 0x020
@@ -895,7 +895,6 @@ memsetw(void *d, int val, size_t size)
#define BUS_DMA_STREAMING 0x100 /* hint: sequential, unidirectional */
#define BUS_DMA_READ 0x200 /* mapping is device -> memory only */
#define BUS_DMA_WRITE 0x400 /* mapping is memory -> device only */
-#define BUS_DMA_COHERENT 0x800 /* hint: map memory DMA coherent */
#define BUS_DMA_NOCACHE BUS_DMA_BUS1
/* Don't bother with alignment */
diff --git a/sys/sys/bus_dma.h b/sys/sys/bus_dma.h
index 2a10d06..8a54fe3 100644
--- a/sys/sys/bus_dma.h
+++ b/sys/sys/bus_dma.h
@@ -78,7 +78,7 @@
#define BUS_DMA_WAITOK 0x00 /* safe to sleep (pseudo-flag) */
#define BUS_DMA_NOWAIT 0x01 /* not safe to sleep */
#define BUS_DMA_ALLOCNOW 0x02 /* perform resource allocation now */
-#define BUS_DMAMEM_NOSYNC 0x04 /* map memory to not require sync */
+#define BUS_DMA_COHERENT 0x04 /* hint: map memory in a coherent way */
#define BUS_DMA_BUS1 0x10 /* placeholders for bus functions... */
#define BUS_DMA_BUS2 0x20
#define BUS_DMA_BUS3 0x40
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