MFC r272193

  Allow the PIC's IMR register to be read before ICW initialisation.

  As of git submit e179f6914152eca9, the Linux kernel does a simple
  probe of the PIC by writing a pattern to the IMR and then reading it
  back, prior to the init sequence of ICW words.

  The bhyve PIC emulation wasn't allowing the IMR to be read until
  the ICW sequence was complete. This limitation isn't required so
  relax the test.

  With this change, Linux kernels 3.15-rc2 and later won't hang
  on boot when calibrating the local APIC.

Approved by: re (gjb)

1 files changed, 12 insertions, 13 deletions

diff --git a/sys/amd64/vmm/io/vatpic.c b/sys/amd64/vmm/io/vatpic.c
index 38fc458..15620d5 100644
--- a/sys/amd64/vmm/io/vatpic.c
+++ b/sys/amd64/vmm/io/vatpic.c
@@ -600,20 +600,19 @@ vatpic_write(struct vatpic *vatpic, struct atpic *atpic, bool in, int port,
 	VATPIC_LOCK(vatpic);
 
 	if (port & ICU_IMR_OFFSET) {
-		if (atpic->ready) {
+		switch (atpic->icw_num) {
+		case 2:
+			error = vatpic_icw2(vatpic, atpic, val);
+			break;
+		case 3:
+			error = vatpic_icw3(vatpic, atpic, val);
+			break;
+		case 4:
+			error = vatpic_icw4(vatpic, atpic, val);
+			break;
+		default:
 			error = vatpic_ocw1(vatpic, atpic, val);
-		} else {
-			switch (atpic->icw_num) {
-			case 2:
-				error = vatpic_icw2(vatpic, atpic, val);
-				break;
-			case 3:
-				error = vatpic_icw3(vatpic, atpic, val);
-				break;
-			case 4:
-				error = vatpic_icw4(vatpic, atpic, val);
-				break;
-			}
+			break;
 		}
 	} else {
 		if (val & (1 << 4))