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authorcognet <cognet@FreeBSD.org>2007-08-18 16:47:28 +0000
committercognet <cognet@FreeBSD.org>2007-08-18 16:47:28 +0000
commitfad9eb8cfef69bb3b592cc5aba729ceda82cae51 (patch)
tree67fcbc96698061e856441440336b3523a67f9e32 /sys
parent05d51a15e9cc000685a8ab21e013895361f68eaa (diff)
downloadFreeBSD-src-fad9eb8cfef69bb3b592cc5aba729ceda82cae51.zip
FreeBSD-src-fad9eb8cfef69bb3b592cc5aba729ceda82cae51.tar.gz
Just wbinv if both PREREAD and PREWRITE are set.
In PREREAD, just invalidate the cache lines, and do not write back them, if the buffer is properly aligned. Approved by: re (blanket)
Diffstat (limited to 'sys')
-rw-r--r--sys/arm/arm/busdma_machdep.c12
1 files changed, 9 insertions, 3 deletions
diff --git a/sys/arm/arm/busdma_machdep.c b/sys/arm/arm/busdma_machdep.c
index 85f350f..2044e2a 100644
--- a/sys/arm/arm/busdma_machdep.c
+++ b/sys/arm/arm/busdma_machdep.c
@@ -1091,13 +1091,19 @@ bus_dmamap_sync_buf(void *buf, int len, bus_dmasync_op_t op)
{
char _tmp_cl[arm_dcache_align], _tmp_clend[arm_dcache_align];
- if (op & BUS_DMASYNC_PREWRITE) {
+ if ((op & BUS_DMASYNC_PREWRITE) && !(op & BUS_DMASYNC_PREREAD)) {
cpu_dcache_wb_range((vm_offset_t)buf, len);
cpu_l2cache_wb_range((vm_offset_t)buf, len);
}
if (op & BUS_DMASYNC_PREREAD) {
- cpu_idcache_wbinv_range((vm_offset_t)buf, len);
- cpu_l2cache_wbinv_range((vm_offset_t)buf, len);
+ if ((op & BUS_DMASYNC_PREWRITE) ||
+ ((((vm_offset_t)(buf) | len) & arm_dcache_align_mask) == 0)) {
+ cpu_dcache_inv_range((vm_offset_t)buf, len);
+ cpu_l2cache_inv_range((vm_offset_t)buf, len);
+ } else {
+ cpu_dcache_wbinv_range((vm_offset_t)buf, len);
+ cpu_l2cache_wbinv_range((vm_offset_t)buf, len);
+ }
}
if (op & BUS_DMASYNC_POSTREAD) {
if ((vm_offset_t)buf & arm_dcache_align_mask) {
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