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authorwollman <wollman@FreeBSD.org>1996-03-29 17:48:21 +0000
committerwollman <wollman@FreeBSD.org>1996-03-29 17:48:21 +0000
commitb8629671223d1be1afab479da0d0326bb91b90da (patch)
tree33e2ea5793fa935cf236a739e3a52b2cd2afad1a /sys
parent92cff4dcbb07770905a96ab952815ab50e1b9675 (diff)
downloadFreeBSD-src-b8629671223d1be1afab479da0d0326bb91b90da.zip
FreeBSD-src-b8629671223d1be1afab479da0d0326bb91b90da.tar.gz
There is no need to zero out the TSC when configuring a counter,
says Mike Haertel.
Diffstat (limited to 'sys')
-rw-r--r--sys/i386/i386/perfmon.c17
1 files changed, 3 insertions, 14 deletions
diff --git a/sys/i386/i386/perfmon.c b/sys/i386/i386/perfmon.c
index 138d5d7..cde2455 100644
--- a/sys/i386/i386/perfmon.c
+++ b/sys/i386/i386/perfmon.c
@@ -26,7 +26,7 @@
* OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*
- * $Id: perfmon.c,v 1.2 1996/03/27 22:02:18 wollman Exp $
+ * $Id: perfmon.c,v 1.4 1996/03/28 21:00:29 wollman Exp $
*/
#include <sys/param.h>
@@ -240,20 +240,9 @@ writectl5(int pmc)
newval |= P5FLAG_E;
newval |= ctl_shadow[0] & 0x3f;
}
- /*
- * ``...But this is the blackest of sins!''
- *
- * According to the Harvard code, it is necessary to zero the
- * cycle counter before writing to the control MSR. This must
- * be an Intel processor... Hope we don't lose too many ticks.
- */
- disable_intr();
- oldtsc = rdtsc();
- wrmsr(0x10 /* TSC */, 0);
+
wrmsr(msr_ctl[0], newval);
- wrmsr(0x10, oldtsc);
- enable_intr();
- return 0; /* XXX should check for errors */
+ return 0; /* XXX should check for unimplemented bits */
}
/*
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