diff options
author | bde <bde@FreeBSD.org> | 1996-11-07 03:05:27 +0000 |
---|---|---|
committer | bde <bde@FreeBSD.org> | 1996-11-07 03:05:27 +0000 |
commit | 511b820d9d9d69cf5ec6f15d1d8ec608806bac70 (patch) | |
tree | 2617a58416aef0abb7663c167a631d55f9c70410 /sys | |
parent | 5f77c6b77da74089e3fe980aae07e53509bbdc37 (diff) | |
download | FreeBSD-src-511b820d9d9d69cf5ec6f15d1d8ec608806bac70.zip FreeBSD-src-511b820d9d9d69cf5ec6f15d1d8ec608806bac70.tar.gz |
Don't switch from fast interrupt handlers to normal interrupt
handlers if interrupts are nested more than a few (3) deep. This
only reduces the maximum nesting level by 1 with the standard
drivers unless there is a related bug somewhere, but can't hurt
much (the worst case is returning to hoggish interrupt handler like
wdintr(), but such interrupt handlers hurt anyway).
Fixed a previously harmless race incrementing the interrupt nesting
level.
This should be in 2.1.6 and 2.2.
Diffstat (limited to 'sys')
-rw-r--r-- | sys/amd64/isa/vector.S | 12 | ||||
-rw-r--r-- | sys/amd64/isa/vector.s | 12 | ||||
-rw-r--r-- | sys/i386/isa/vector.s | 12 |
3 files changed, 24 insertions, 12 deletions
diff --git a/sys/amd64/isa/vector.S b/sys/amd64/isa/vector.S index e386a11..aacc8c5 100644 --- a/sys/amd64/isa/vector.S +++ b/sys/amd64/isa/vector.S @@ -1,6 +1,6 @@ /* * from: vector.s, 386BSD 0.1 unknown origin - * $Id: vector.s,v 1.21 1996/10/30 22:39:04 asami Exp $ + * $Id: vector.s,v 1.22 1996/11/06 17:02:38 bde Exp $ */ /* @@ -135,7 +135,8 @@ IDTVEC(vec_name) ; \ movl _cpl,%eax ; /* are we unmasking pending HWIs or SWIs? */ \ notl %eax ; \ andl _ipending,%eax ; \ - jne 1f ; /* yes, handle them */ \ + jne 2f ; /* yes, maybe handle them */ \ +1: ; \ MEXITCOUNT ; \ MAYBE_POPL_ES ; \ popl %ds ; \ @@ -145,9 +146,13 @@ IDTVEC(vec_name) ; \ iret ; \ ; \ ALIGN_TEXT ; \ -1: ; \ +2: ; \ + cmpb $3,_intr_nesting_level ; /* is there enough stack? */ \ + jae 1b ; /* no, return */ \ movl _cpl,%eax ; \ + /* XXX next line is probably unnecessary now. */ \ movl $HWI_MASK|SWI_MASK,_cpl ; /* limit nesting ... */ \ + incb _intr_nesting_level ; /* ... really limit it ... */ \ sti ; /* ... to do this as early as possible */ \ MAYBE_POPL_ES ; /* discard most of thin frame ... */ \ popl %ecx ; /* ... original %ds ... */ \ @@ -163,7 +168,6 @@ IDTVEC(vec_name) ; \ movl (2+8+1)*4(%esp),%eax ; /* ... cpl from thin frame */ \ pushl %eax ; \ subl $4,%esp ; /* junk for unit number */ \ - incb _intr_nesting_level ; \ MEXITCOUNT ; \ jmp _doreti diff --git a/sys/amd64/isa/vector.s b/sys/amd64/isa/vector.s index e386a11..aacc8c5 100644 --- a/sys/amd64/isa/vector.s +++ b/sys/amd64/isa/vector.s @@ -1,6 +1,6 @@ /* * from: vector.s, 386BSD 0.1 unknown origin - * $Id: vector.s,v 1.21 1996/10/30 22:39:04 asami Exp $ + * $Id: vector.s,v 1.22 1996/11/06 17:02:38 bde Exp $ */ /* @@ -135,7 +135,8 @@ IDTVEC(vec_name) ; \ movl _cpl,%eax ; /* are we unmasking pending HWIs or SWIs? */ \ notl %eax ; \ andl _ipending,%eax ; \ - jne 1f ; /* yes, handle them */ \ + jne 2f ; /* yes, maybe handle them */ \ +1: ; \ MEXITCOUNT ; \ MAYBE_POPL_ES ; \ popl %ds ; \ @@ -145,9 +146,13 @@ IDTVEC(vec_name) ; \ iret ; \ ; \ ALIGN_TEXT ; \ -1: ; \ +2: ; \ + cmpb $3,_intr_nesting_level ; /* is there enough stack? */ \ + jae 1b ; /* no, return */ \ movl _cpl,%eax ; \ + /* XXX next line is probably unnecessary now. */ \ movl $HWI_MASK|SWI_MASK,_cpl ; /* limit nesting ... */ \ + incb _intr_nesting_level ; /* ... really limit it ... */ \ sti ; /* ... to do this as early as possible */ \ MAYBE_POPL_ES ; /* discard most of thin frame ... */ \ popl %ecx ; /* ... original %ds ... */ \ @@ -163,7 +168,6 @@ IDTVEC(vec_name) ; \ movl (2+8+1)*4(%esp),%eax ; /* ... cpl from thin frame */ \ pushl %eax ; \ subl $4,%esp ; /* junk for unit number */ \ - incb _intr_nesting_level ; \ MEXITCOUNT ; \ jmp _doreti diff --git a/sys/i386/isa/vector.s b/sys/i386/isa/vector.s index e386a11..aacc8c5 100644 --- a/sys/i386/isa/vector.s +++ b/sys/i386/isa/vector.s @@ -1,6 +1,6 @@ /* * from: vector.s, 386BSD 0.1 unknown origin - * $Id: vector.s,v 1.21 1996/10/30 22:39:04 asami Exp $ + * $Id: vector.s,v 1.22 1996/11/06 17:02:38 bde Exp $ */ /* @@ -135,7 +135,8 @@ IDTVEC(vec_name) ; \ movl _cpl,%eax ; /* are we unmasking pending HWIs or SWIs? */ \ notl %eax ; \ andl _ipending,%eax ; \ - jne 1f ; /* yes, handle them */ \ + jne 2f ; /* yes, maybe handle them */ \ +1: ; \ MEXITCOUNT ; \ MAYBE_POPL_ES ; \ popl %ds ; \ @@ -145,9 +146,13 @@ IDTVEC(vec_name) ; \ iret ; \ ; \ ALIGN_TEXT ; \ -1: ; \ +2: ; \ + cmpb $3,_intr_nesting_level ; /* is there enough stack? */ \ + jae 1b ; /* no, return */ \ movl _cpl,%eax ; \ + /* XXX next line is probably unnecessary now. */ \ movl $HWI_MASK|SWI_MASK,_cpl ; /* limit nesting ... */ \ + incb _intr_nesting_level ; /* ... really limit it ... */ \ sti ; /* ... to do this as early as possible */ \ MAYBE_POPL_ES ; /* discard most of thin frame ... */ \ popl %ecx ; /* ... original %ds ... */ \ @@ -163,7 +168,6 @@ IDTVEC(vec_name) ; \ movl (2+8+1)*4(%esp),%eax ; /* ... cpl from thin frame */ \ pushl %eax ; \ subl $4,%esp ; /* junk for unit number */ \ - incb _intr_nesting_level ; \ MEXITCOUNT ; \ jmp _doreti |