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authorjhb <jhb@FreeBSD.org>2001-05-17 22:24:17 +0000
committerjhb <jhb@FreeBSD.org>2001-05-17 22:24:17 +0000
commit358431e5bff02eb1cc9ab74c8edb2df0a2ca2d2b (patch)
tree0dc672e0b911c8cd83093d212e5c7aaf6d39bca7 /sys
parentfff1e2f2427f31a994f85981b3a8b32a23f746c5 (diff)
downloadFreeBSD-src-358431e5bff02eb1cc9ab74c8edb2df0a2ca2d2b.zip
FreeBSD-src-358431e5bff02eb1cc9ab74c8edb2df0a2ca2d2b.tar.gz
- Axe the IMEN_BITS and APIC_IMEN_BITS constants.
- Add back in a definition of NHWI which is preferred over ICU_LEN. Submitted by: bde
Diffstat (limited to 'sys')
-rw-r--r--sys/amd64/isa/icu.h7
-rw-r--r--sys/i386/isa/icu.h7
2 files changed, 6 insertions, 8 deletions
diff --git a/sys/amd64/isa/icu.h b/sys/amd64/isa/icu.h
index 1c87d3f..0176541 100644
--- a/sys/amd64/isa/icu.h
+++ b/sys/amd64/isa/icu.h
@@ -61,10 +61,8 @@ void INTRDIS __P((u_int));
#ifdef APIC_IO
extern unsigned apic_imen; /* APIC interrupt mask enable */
-#define APIC_IMEN_BITS 32 /* number of bits in apic_imen */
#else
extern unsigned imen; /* interrupt mask enable */
-#define IMEN_BITS 16 /* number of bits in imen */
#endif
#endif /* LOCORE */
@@ -108,7 +106,6 @@ extern unsigned imen; /* interrupt mask enable */
#define IRQ_SLAVE 0x0080
#endif
-
/*
* Interrupt Control offset into Interrupt descriptor table (IDT)
*/
@@ -116,14 +113,16 @@ extern unsigned imen; /* interrupt mask enable */
#ifdef APIC_IO
-/* 32-47: ISA IRQ0-IRQ15, 48-55: IO APIC IRQ16-IRQ31 */
+/* 32-47: ISA IRQ0-IRQ15, 48-63: IO APIC IRQ16-IRQ31 */
#define ICU_LEN 32
#define HWI_MASK 0xffffffff /* bits for h/w interrupts */
+#define NHWI 32
#else
#define ICU_LEN 16 /* 32-47 are ISA interrupts */
#define HWI_MASK 0xffff /* bits for h/w interrupts */
+#define NHWI 16
#endif /* APIC_IO */
diff --git a/sys/i386/isa/icu.h b/sys/i386/isa/icu.h
index 1c87d3f..0176541 100644
--- a/sys/i386/isa/icu.h
+++ b/sys/i386/isa/icu.h
@@ -61,10 +61,8 @@ void INTRDIS __P((u_int));
#ifdef APIC_IO
extern unsigned apic_imen; /* APIC interrupt mask enable */
-#define APIC_IMEN_BITS 32 /* number of bits in apic_imen */
#else
extern unsigned imen; /* interrupt mask enable */
-#define IMEN_BITS 16 /* number of bits in imen */
#endif
#endif /* LOCORE */
@@ -108,7 +106,6 @@ extern unsigned imen; /* interrupt mask enable */
#define IRQ_SLAVE 0x0080
#endif
-
/*
* Interrupt Control offset into Interrupt descriptor table (IDT)
*/
@@ -116,14 +113,16 @@ extern unsigned imen; /* interrupt mask enable */
#ifdef APIC_IO
-/* 32-47: ISA IRQ0-IRQ15, 48-55: IO APIC IRQ16-IRQ31 */
+/* 32-47: ISA IRQ0-IRQ15, 48-63: IO APIC IRQ16-IRQ31 */
#define ICU_LEN 32
#define HWI_MASK 0xffffffff /* bits for h/w interrupts */
+#define NHWI 32
#else
#define ICU_LEN 16 /* 32-47 are ISA interrupts */
#define HWI_MASK 0xffff /* bits for h/w interrupts */
+#define NHWI 16
#endif /* APIC_IO */
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