- Comment most of the remaining hypercalls in hcall.S

- implement hypercalls returning a single value
- start fixing the fallout of the recent changes needed to get
  the kernel compiling again

18 files changed, 444 insertions, 132 deletions

diff --git a/sys/sun4v/include/hv_api.h b/sys/sun4v/include/hv_api.h
index 55d7bf6..846225d 100644
--- a/sys/sun4v/include/hv_api.h
+++ b/sys/sun4v/include/hv_api.h
@@ -34,6 +34,20 @@ typedef uint64_t pci_device_t;
 typedef uint32_t pci_config_offset_t;
 typedef uint8_t pci_config_size_t;
 
+typedef uint64_t tsbid_t;
+typedef uint32_t pages_t;
+typedef enum io_attributes {
+	PCI_MAP_ATTR_READ	= (uint32_t)0x01,
+	PCI_MAP_ATTR_WRITE	= (uint32_t)0x02,
+} io_attributes_t;
+typedef enum io_sync_direction {
+	IO_SYNC_DEVICE		= (uint32_t)0x01,
+	IO_SYNC_CPU		= (uint32_t)0x02,
+} io_sync_direction_t;
+typedef uint64_t io_page_list_t;
+typedef uint64_t r_addr_t;
+typedef uint64_t io_addr_t;
+
 /*
  * Section 10 Domain Services
  */
@@ -62,8 +76,8 @@ typedef struct hv_tsb_info {
 } hv_tsb_info_t;
 
 
-extern uint64_t	hv_tsb_ctx0(uint64_t, uint64_t);
-extern uint64_t	hv_tsb_ctxnon0(uint64_t, uint64_t);
+extern uint64_t	hv_mmu_tsb_ctx0(uint64_t, uint64_t);
+extern uint64_t	hv_mmu_tsb_ctxnon0(uint64_t, uint64_t);
 
 /*
  * Section 13 Cache and Memory Services
@@ -137,14 +151,14 @@ typedef struct ldc_state_info {
 #define LDC_CHANNEL_DOWN     0
 #define LDC_CHANNEL_UP       1
 
-extern uint64_t hvio_ldc_tx_qconf(uint64_t ldc_id, uint64_t base_raddr, uint64_t nentries);
-extern uint64_t hvio_ldc_tx_qinfo(uint64_t ldc_id, uint64_t *base_raddr, uint64_t *nentries);
-extern uint64_t hvio_ldc_tx_get_state(uint64_t ldc_id, ldc_state_info_t *info); 
-extern uint64_t hvio_ldc_tx_set_qtail(uint64_t ldc_id, uint64_t tail_offset);
-extern uint64_t hvio_ldc_rx_get_state(uint64_t ldc_id, ldc_state_info_t *info); 
-extern uint64_t hvio_ldc_rx_qconf(uint64_t ldc_id, uint64_t base_raddr, uint64_t nentries);
-extern uint64_t hvio_ldc_rx_qinfo(uint64_t ldc_id, uint64_t *base_raddr, uint64_t *nentries);
-extern uint64_t hvio_ldc_rx_set_qhead(uint64_t ldc_id, uint64_t head_offset);
+extern uint64_t hv_ldc_tx_qconf(uint64_t ldc_id, uint64_t base_raddr, uint64_t nentries);
+extern uint64_t hv_ldc_tx_qinfo(uint64_t ldc_id, uint64_t *base_raddr, uint64_t *nentries);
+extern uint64_t hv_ldc_tx_get_state(uint64_t ldc_id, ldc_state_info_t *info); 
+extern uint64_t hv_ldc_tx_set_qtail(uint64_t ldc_id, uint64_t tail_offset);
+extern uint64_t hv_ldc_rx_get_state(uint64_t ldc_id, ldc_state_info_t *info); 
+extern uint64_t hv_ldc_rx_qconf(uint64_t ldc_id, uint64_t base_raddr, uint64_t nentries);
+extern uint64_t hv_ldc_rx_qinfo(uint64_t ldc_id, uint64_t *base_raddr, uint64_t *nentries);
+extern uint64_t hv_ldc_rx_set_qhead(uint64_t ldc_id, uint64_t head_offset);
 
 
 /*
@@ -152,6 +166,22 @@ extern uint64_t hvio_ldc_rx_set_qhead(uint64_t ldc_id, uint64_t head_offset);
  *
  */
 
+extern uint64_t hv_pci_iommu_map(devhandle_t dh, uint64_t tsbid, uint64_t nttes, uint64_t io_attributes, 
+				 vm_paddr_t io_page_list, pages_t *nttes_mapped);
+extern uint64_t hv_pci_iommu_demap(devhandle_t dh, uint64_t tsbid, uint64_t nttes, pages_t *nttes_demapped);
+extern uint64_t hv_pci_iommu_getmap(devhandle_t dh, uint64_t tsbid, uint64_t nttes, uint64_t *io_attributes, 
+				    vm_paddr_t *ra);
+extern uint64_t hv_pci_iommu_getbypass(devhandle_t dh, vm_paddr_t ra, uint64_t io_attributes, uint64_t *io_addr);
+extern uint64_t hv_pci_config_get(devhandle_t dh, uint64_t pci_device, uint64_t pci_config_offset, uint64_t size,
+				  uint64_t *error, uint64_t *data);
+extern uint64_t hv_pci_config_put(devhandle_t dh, uint64_t pci_device, uint64_t pci_config_offset, uint64_t size,
+				  uint64_t data, uint64_t *error_flag);
+extern uint64_t hv_pci_peek(devhandle_t dh, vm_paddr_t ra, uint64_t size, uint64_t *error_flag, uint64_t *data);
+extern uint64_t hv_pci_poke(devhandle_t dh, vm_paddr_t ra, uint64_t size, uint64_t data, uint64_t pci_device, 
+			    uint64_t *error_flag);
+extern uint64_t hv_pci_dma_sync(devhandle_t dh, vm_paddr_t ra, uint64_t size, uint64_t io_sync_direction, 
+			    uint64_t *nsynced);
+
 
 /*
  * Section 21 MSI Services
@@ -175,3 +205,5 @@ extern void hv_magic_trap_on(void);
 extern void hv_magic_trap_off(void);
 extern int hv_sim_read(uint64_t offset, vm_paddr_t buffer_ra, uint64_t size);
 extern int hv_sim_write(uint64_t offset, vm_paddr_t buffer_ra, uint64_t size);
+
+#endif /* _MACHINE_HV_API_H */
diff --git a/sys/sun4v/include/pmap.h b/sys/sun4v/include/pmap.h
index 3115fff..8390937 100644
--- a/sys/sun4v/include/pmap.h
+++ b/sys/sun4v/include/pmap.h
@@ -44,7 +44,7 @@
 #include <sys/_lock.h>
 #include <sys/_mutex.h>
 #include <machine/cache.h>
-#include <machine/hypervisorvar.h>
+#include <machine/hv_api.h>
 
 #define TSB_INIT_SHIFT          3
 #define	PMAP_CONTEXT_MAX	8192
@@ -81,7 +81,7 @@ struct pmap {
 	struct	pmap_statistics pm_stats;
 	uint32_t                pm_tsb_miss_count;
 	uint32_t                pm_tsb_cap_miss_count;
-	vm_paddr_t              pm_old_tsb_pa[TSB_MAX_RESIZE];
+	vm_paddr_t              pm_old_tsb_ra[TSB_MAX_RESIZE];
 };
 
 #define	PMAP_LOCK(pmap)		mtx_lock(&(pmap)->pm_mtx)
diff --git a/sys/sun4v/include/sun4v_cpufunc.h b/sys/sun4v/include/sun4v_cpufunc.h
index 4870d0d..61eb2cc 100644
--- a/sys/sun4v/include/sun4v_cpufunc.h
+++ b/sys/sun4v/include/sun4v_cpufunc.h
@@ -28,7 +28,7 @@
 
 #ifndef	_MACHINE_SUN4V_CPUFUNC_H_
 #define	_MACHINE_SUN4V_CPUFUNC_H_
-#include <machine/hypervisor_api.h>
+#include <machine/hv_api.h>
 void set_mmfsa_scratchpad(vm_paddr_t mmfsa);
 
 void set_hash_user_scratchpad(uint64_t);
diff --git a/sys/sun4v/mdesc/mdesc_init.c b/sys/sun4v/mdesc/mdesc_init.c
index 4625cd6..63b9ffe 100644
--- a/sys/sun4v/mdesc/mdesc_init.c
+++ b/sys/sun4v/mdesc/mdesc_init.c
@@ -38,7 +38,8 @@ __FBSDID("$FreeBSD$");
 #include <vm/vm.h>
 #include <vm/pmap.h>
 
-#include <machine/hypervisor_api.h>
+#include <machine/hypervisorvar.h>
+#include <machine/hv_api.h>
 #include <machine/cddl/mdesc.h>
 #include <machine/cddl/mdesc_impl.h>
 
diff --git a/sys/sun4v/sun4v/hcall.S b/sys/sun4v/sun4v/hcall.S
index 4b721a8..23a75a0 100644
--- a/sys/sun4v/sun4v/hcall.S
+++ b/sys/sun4v/sun4v/hcall.S
@@ -27,10 +27,11 @@
  */
 
 #include <sys/cdefs.h>
-
+	
+#include <machine/asm.h>
 #include <machine/asi.h>
 #include <machine/asmacros.h>
-#include <machine/hv_api.h>
+#include <machine/hypervisorvar.h>
 #include <machine/pstate.h>
 
 #include "assym.s"
@@ -96,6 +97,10 @@ END(hv_cpu_get_rtba)
  * 
  */
 ENTRY(hv_cpu_yield)
+	mov	CPU_YIELD, %o5
+	ta	FAST_TRAP
+	retl
+	  nop
 END(hv_cpu_yield)
 
 /*
@@ -109,6 +114,10 @@ END(hv_cpu_yield)
  * 
  */
 ENTRY(hv_cpu_qconf)
+	mov	CPU_QCONF, %o5
+	ta	FAST_TRAP
+	retl
+	  nop
 END(hv_cpu_qconf)
 	
 /*
@@ -121,7 +130,6 @@ END(hv_cpu_qconf)
  * ret2 nentries     (%o2)
  * 
  */
-/*
 ENTRY(hv_cpu_qinfo)
 END(hv_cpu_qinfo)
 	
@@ -169,13 +177,17 @@ END(hv_cpu_state)
  * set the tsb(s) for the current cpu for context 0
  *
  * arg0 ntsb         (%o0)
- * arg0 tsbdptr      (%o1)
+ * arg1 tsbdptr      (%o1)
  *		
  * ret0 status       (%o0)
  * 
  */
-ENTRY(hv_tsb_ctx0)
-END(hv_tsb_ctx0)
+ENTRY(hv_mmu_tsb_ctx0)
+	mov	MMU_TSB_CTX0, %o5
+	ta	FAST_TRAP
+	retl
+	  nop
+END(hv_mmu_tsb_ctx0)
 
 /*
  * set the tsb(s) for the current cpu for non-zero contexts 
@@ -186,8 +198,12 @@ END(hv_tsb_ctx0)
  * ret0 status       (%o0)
  * 
  */
-ENTRY(hv_tsb_ctxnon0)
-END(hv_tsb_ctxnon0)
+ENTRY(hv_mmu_tsb_ctxnon0)
+	mov	MMU_TSB_CTXNON0, %o5
+	ta	FAST_TRAP
+	retl
+	  nop
+END(hv_mmu_tsb_ctxnon0)
 
 ENTRY(hv_mmu_demap_page)
 END(hv_mmu_demap_page)
@@ -230,9 +246,30 @@ END(hv_mmu_fault_area_info)
  *
  */
 
+/*
+ * zero from raddr to raddr+length-1
+ *
+ * arg0 raddr         (%o0)
+ * arg1 length        (%o1)
+ *		
+ * ret0 status        (%o0)
+ * ret1 length scrubbed (%o1)
+ * 
+ */
 ENTRY(hv_mem_scrub)
 END(hv_mem_scrub)
 
+/*
+ * for the memory address range from raddr to raddr+length-1
+ * for the next access within that range from main system memory
+ *
+ * arg0 raddr         (%o0)
+ * arg1 length        (%o1)
+ *		
+ * ret0 status        (%o0)
+ * ret1 length synced (%o1)
+ * 
+ */
 ENTRY(hv_mem_sync)
 END(hv_mem_sync)
 
@@ -241,28 +278,106 @@ END(hv_mem_sync)
  *
  */
 
-ENTRY(hv_intr_devino_to_sysino)	
-END(hv_intr_devino_to_sysino)	
-
+/*
+ * converts a device specific interrupt number given by
+ * devhandle and devino	to a system specific ino (sysino)
+ *
+ * arg0 devhandle     (%o0)
+ * arg1 devino        (%o1)
+ *		
+ * ret0 status        (%o0)
+ * ret1 sysino        (%o1)
+ * 
+ */
 ENTRY(hv_intr_devino_to_sysino)	
 END(hv_intr_devino_to_sysino)
 
+/*
+ * return intr enabled state
+ *
+ * arg0 sysino        (%o0)
+ *		
+ * ret0 status        (%o0)
+ * ret1 intr_enabled  (%o1)
+ * 
+ */
 ENTRY(hv_intr_getenabled)
 END(hv_intr_getenabled)
 
+/*
+ * set intr enabled state
+ *
+ * arg0 sysino        (%o0)
+ * arg1 intr_enabled  (%o1)
+ *		
+ * ret0 status        (%o0)
+ * 
+ */
 ENTRY(hv_intr_setenabled)
+	mov	INTR_SETENABLED, %o5
+	ta	FAST_TRAP
+	retl
+	  nop
 END(hv_intr_setenabled)
 
+/*
+ * return current state of the interrupt given
+ * by the sysino 	
+ *
+ * arg0 sysino        (%o0)
+ *		
+ * ret0 status        (%o0)
+ * ret1 intr_state    (%o1)
+ * 
+ */
 ENTRY(hv_intr_getstate)
 END(hv_intr_getstate)
 
+/*
+ * set the current state of the interrupt given
+ * by the sysino 	
+ *
+ * arg0 sysino        (%o0)
+ * arg1 intr_state    (%o1)
+ *		
+ * ret0 status        (%o0)
+ * 
+ */
 ENTRY(hv_intr_setstate)
+	mov	INTR_SETSTATE, %o5
+	ta	FAST_TRAP
+	retl
+	  nop	
 END(hv_intr_setstate)
 
+/*
+ * return the cpuid that is the current target of the 
+ * interrupt given by the sysino
+ *
+ * arg0 sysino        (%o0)
+ *		
+ * ret0 status        (%o0)
+ * ret1 cpuid         (%o1)
+ * 
+ */
 ENTRY(hv_intr_gettarget)
 END(hv_intr_gettarget)
 
+/*
+ * set the target to cpuid that for the
+ * interrupt given by the sysino
+ *
+ * arg0 sysino        (%o0)
+ * arg1 cpuid         (%o1)
+ *		
+ * ret0 status        (%o0)
+ * 
+ */
 ENTRY(hv_intr_settarget)
+	mov	INTR_SETTARGET, %o5
+	ta	FAST_TRAP
+	retl
+	  nop
 END(hv_intr_settarget)
 
 /*
@@ -304,10 +419,28 @@ END(hv_tod_set)
  *
  */
 	
+/*
+ * return a character from the console device
+ *
+ * ret0 status       (%o0)
+ * ret1 character    (%o0)
+ * 
+ */
 ENTRY(hv_cons_getchar)
 END(hv_cons_getchar)
 	
+/*
+ * send a character to the console device
+ * arg0 char         (%o0)
+ *
+ * ret0 status       (%o0)
+ * 
+ */
 ENTRY(hv_cons_putchar)
+	mov	CONS_PUTCHAR, %o5
+	ta	FAST_TRAP
+	retl
+	  nop
 END(hv_cons_putchar)
 
 /*
@@ -364,10 +497,27 @@ END(hv_cons_read)
  * Section 17 Core Dump Services
  *
  */
-
-ENTRY(hv_dump_buf_update)
+	
+/*
+ * declare a domain dump buffer to the hypervisor
+ * arg0 raddr        (%o0)
+ * arg1 size         (%o1)
+ *
+ * ret0 status       (%o0)
+ * ret1 required size of the dump buffer (%o1)
+ * 
+ */
+ENTRY(hv_dump_buf_update)	
 END(hv_dump_buf_update)
 
+/*
+ * return the currently configured dump buffer description 
+ *
+ * ret0 status                          (%o0)
+ * ret1 ra of the current dump buffer   (%o1)
+ * ret2 size of the current dump buffer (%o2)
+ * 
+ */
 ENTRY(hv_dump_buf_info)
 END(hv_dump_buf_info)
 
@@ -377,12 +527,13 @@ END(hv_dump_buf_info)
  */
 
 /*
- * TTRACE_BUF_CONF Configure
- * arg0 RA base of buffer (%o0)
+ * arg0 RA base of buffer          (%o0)
  * arg1 buf size in no. of entries (%o1)
+ *
  * ret0 status (%o0)
  * ret1 minimum size in no. of entries on failure,
  * actual size in no. of entries on success (%o1)
+ *	
  */
 ENTRY(hv_ttrace_buf_conf)
 	mov	TTRACE_BUF_CONF, %o5
@@ -391,11 +542,14 @@ ENTRY(hv_ttrace_buf_conf)
 	  stx	%o1, [%o2]
 END(hv_ttrace_buf_conf)
 
- /*
- * TTRACE_BUF_INFO
- * ret0 status (%o0)
- * ret1 RA base of buffer (%o1)
- * ret2 size in no. of entries (%o2)
+/*
+ * return the size and location of a previously declare
+ * trap-trace buffer		
+ *	
+ * ret0 status                  (%o0)
+ * ret1 RA base of buffer       (%o1)
+ * ret2 size in no. of entries  (%o2)
+ *	
  */
 ENTRY(hv_ttrace_buf_info)
 	mov	%o0, %o3
@@ -408,10 +562,13 @@ ENTRY(hv_ttrace_buf_info)
 END(hv_ttrace_buf_info)
 
 /*
- * TTRACE_ENABLE
- * arg0 enable/ disable (%o0)
- * ret0 status (%o0)
+ * enable / disable trap tracing
+ *		
+ * arg0 enable / disable      (%o0)
+ *	
+ * ret0 status                (%o0)
  * ret1 previous enable state (%o1)
+ *	
  */
 ENTRY(hv_ttrace_enable)
 	mov	%o1, %o2
@@ -438,14 +595,15 @@ ENTRY(hv_ttrace_freeze)
 END(hv_ttrace_freeze)
 
 /*
- * TTRACE_ADDENTRY
+ * add an entry to the trap trace buffer
+ *		
  * arg0 tag (16-bits) (%o0)
- * arg1 data word 0 (%o1)
- * arg2 data word 1 (%o2)
- * arg3 data word 2 (%o3)
- * arg4 data word 3 (%o4)
+ * arg1 data word 0   (%o1)
+ * arg2 data word 1   (%o2)
+ * arg3 data word 2   (%o3)
+ * arg4 data word 3   (%o4)
  *
- * ret0 status (%o0)
+ * ret0 status        (%o0)
  *
 */
 ENTRY(hv_ttrace_addentry)
@@ -461,6 +619,7 @@ END(hv_ttrace_addentry)
 	
 /*
  * configure ldc tx queue
+ *	
  * arg0 ldc_id     (%o0)
  * arg1 base_raddr (%o1)
  * arg2 nentries   (%o2)
@@ -477,6 +636,7 @@ END(hv_ldc_tx_qconf)
 
 /*
  * return configuration info for ldc tx queue
+ *	
  * arg0 ldc_id     (%o0)
  *
  * ret0 status     (%o0)
@@ -499,6 +659,7 @@ END(hv_ldc_tx_qinfo)
 
 /*
  * get the state of the ldc tx queue
+ *	
  * arg0 ldc_id        (%o0)
  *
  * ret0 status        (%o0)
@@ -522,6 +683,7 @@ END(hv_ldc_tx_get_state)
 
 /*
  * update the tail pointer of the ldc tx queue
+ *	
  * arg0 ldc_id      (%o0)
  * arg1 tail_offset (%o1)
  *
@@ -537,6 +699,7 @@ END(hv_ldc_tx_set_qtail)
 
 /*
  * configure ldc rx queue
+ *	
  * arg0 ldc_id     (%o0)
  * arg1 base_raddr (%o1)
  * arg2 nentries   (%o2)
@@ -553,6 +716,7 @@ END(hv_ldc_rx_qconf)
 
 /*
  * return configuration info for ldc rx queue
+ *	
  * arg0 ldc_id     (%o0)
  *
  * ret0 status     (%o0)
@@ -575,6 +739,7 @@ END(hv_ldc_rx_qinfo)
 
 /*
  * get the state of the ldc rx queue
+ *	
  * arg0 ldc_id        (%o0)
  *
  * ret0 status        (%o0)
@@ -598,6 +763,7 @@ END(hv_ldc_rx_get_state)
 
 /*
  * update the head pointer of the ldc rx queue
+ *	
  * arg0 ldc_id      (%o0)
  * arg1 head_offset (%o1)
  *
@@ -626,7 +792,7 @@ END(hv_ldc_mapin)
 ENTRY(hv_ldc_unmap)
 END(hv_ldc_unmap)
 
-ENTRY(hv_ldc_revoke
+ENTRY(hv_ldc_revoke)
 END(hv_ldc_revoke)
 		
 /*
@@ -634,30 +800,142 @@ END(hv_ldc_revoke)
  *
  */
 	
+/*
+ * create iommu mappings in the device defined by devhandle
+ *	
+ * arg0 devhandle        (%o0)
+ * arg1 tsbid            (%o1)
+ * arg2 nttes            (%o2)
+ * arg3 io_attributes    (%o3)
+ * arg4 io_page_list_p   (%o4)
+ *
+ * ret0 status           (%o0)
+ * ret1 nttes_mapped     (%o1)
+ *
+ */
 ENTRY(hv_pci_iommu_map)
 END(hv_pci_iommu_map)
 
+/*
+ * demap and flush iommu mappings in the device defined by devhandle
+ *	
+ * arg0 devhandle        (%o0)
+ * arg1 tsbid            (%o1)
+ * arg2 nttes            (%o2)
+ *
+ * ret0 status           (%o0)
+ * ret1 nttes_demapped   (%o1)
+ *
+ */
 ENTRY(hv_pci_iommu_demap)
 END(hv_pci_iommu_demap)
 
+/*
+ * read and return the mapping in the device defined by devhandle
+ *	
+ * arg0 devhandle        (%o0)
+ * arg1 tsbid            (%o1)
+ *
+ * ret0 status           (%o0)
+ * ret1 io_attributes    (%o1)
+ * ret2 ra               (%o2)
+ *
+ */
 ENTRY(hv_pci_iommu_getmap)
 END(hv_pci_iommu_getmap)
 
+/*
+ * create a "special" mapping in the device given by devhandle
+ *	
+ * arg0 devhandle        (%o0)
+ * arg1 r_addr           (%o1)
+ * arg2 io_attributes    (%o2)
+ *
+ * ret0 status           (%o0)
+ * ret1 io_addr          (%o1)
+ *
+ */
 ENTRY(hv_pci_iommu_getbypass)
 END(hv_pci_iommu_getbypass)
 	
+/*
+ * read PCI configuration space for adapter specified by devhandle
+ *	
+ * arg0 devhandle        (%o0)
+ * arg1 pci_device       (%o1)
+ * arg2 pci_config_offset(%o2)
+ * arg3 size             (%o3)
+ *
+ * ret0 status           (%o0)
+ * ret1 error_flag       (%o1)
+ * ret2 data             (%o2)
+ *
+ */
 ENTRY(hv_pci_config_get)
 END(hv_pci_config_get)
 
+/*
+ * write PCI config space for the PCI adapter
+ * specified by devhandle	
+ *	
+ * arg0 devhandle        (%o0)
+ * arg1 pci_device       (%o1)
+ * arg2 pci_config_offset(%o2)
+ * arg3 size             (%o3)
+ * arg4 data             (%o4)
+ *
+ * ret0 status           (%o0)
+ * ret1 error_flag       (%o1)
+ *
+ */	
 ENTRY(hv_pci_config_put)
 END(hv_pci_config_put)
 
+/*
+ * read the io-address given by devhandle, raddr, and size
+ *	
+ * arg0 devhandle        (%o0)
+ * arg1 raddr            (%o1)
+ * arg2 size             (%o2)
+ *
+ * ret0 status           (%o0)
+ * ret1 error_flag       (%o1)
+ * ret2 data             (%o2)
+ *
+ */	
 ENTRY(hv_pci_peek)
 END(hv_pci_peek)
 
+/*
+ * attempt to write data to the io-address
+ * specified by devhandle, raddr, and size	
+ *	
+ * arg0 devhandle        (%o0)
+ * arg1 raddr            (%o1)
+ * arg2 size             (%o2)
+ * arg3 data             (%o3)
+ * arg4 pci_device       (%o4)
+ *
+ * ret0 status           (%o0)
+ * ret1 error_flag       (%o1)
+ *
+ */	
 ENTRY(hv_pci_poke)
 END(hv_pci_poke)
 
+/*
+ * attempt to write data to the io-address
+ * specified by devhandle, raddr, and size	
+ *	
+ * arg0 devhandle        (%o0)
+ * arg1 raddr            (%o1)
+ * arg2 size             (%o2)
+ * arg3 io_sync_direction(%o3)
+ *
+ * ret0 status           (%o0)
+ * ret1 nsynced          (%o1)
+ *
+ */	
 ENTRY(hv_pci_dma_sync)
 END(hv_pci_dma_sync)
 
diff --git a/sys/sun4v/sun4v/hv_pci.c b/sys/sun4v/sun4v/hv_pci.c
index 67aeaa5..3e68abf2 100644
--- a/sys/sun4v/sun4v/hv_pci.c
+++ b/sys/sun4v/sun4v/hv_pci.c
@@ -46,7 +46,8 @@ __FBSDID("$FreeBSD$");
 
 #include <machine/bus.h>
 
-#include <machine/hypervisor_api.h>
+#include <machine/hypervisorvar.h>
+#include <machine/hv_api.h>
 
 #include <dev/ofw/ofw_bus.h>
 #include <dev/ofw/ofw_bus_subr.h>
@@ -258,11 +259,6 @@ hvpci_maxslots(device_t dev)
 
 #define HVPCI_BDF(b, d, f)	\
 		((b & 0xff) << 16) | ((d & 0x1f) << 11) | ((f & 0x7) << 8)
-#if 0
-hvio_config_get(devhandle_t dev_hdl, pci_device_t bdf,
-    pci_config_offset_t off, pci_config_size_t size, pci_cfg_data_t *data_p)
-{ return (0); }
-#endif
 static uint32_t
 hvpci_read_config(device_t dev, u_int bus, u_int slot, u_int func, u_int reg,
     int width)
@@ -274,7 +270,7 @@ hvpci_read_config(device_t dev, u_int bus, u_int slot, u_int func, u_int reg,
 
 	sc = device_get_softc(dev);
 
-	r = hvio_config_get(sc->hs_devhandle, HVPCI_BDF(bus, slot, func),
+	r = hv_pci_config_get(sc->hs_devhandle, HVPCI_BDF(bus, slot, func),
 			    reg, width, (pci_cfg_data_t *)&data);
 		
 	if (r == H_EOK) {
@@ -299,11 +295,6 @@ hvpci_read_config(device_t dev, u_int bus, u_int slot, u_int func, u_int reg,
 	return -1;
 }
 
-#if 0
-uint64_t
-hvio_config_put(devhandle_t dev_hdl, pci_device_t bdf,
-    pci_config_offset_t off, pci_config_size_t size, pci_cfg_data_t data)
-#endif
 static void
 hvpci_write_config(device_t dev, u_int bus, u_int slot, u_int func, u_int reg,
      uint32_t val, int width)
@@ -327,7 +318,7 @@ hvpci_write_config(device_t dev, u_int bus, u_int slot, u_int func, u_int reg,
 		panic("unsupported width: %d", width);
 	}
 
-	r = hvio_config_put(sc->hs_devhandle, HVPCI_BDF(bus, slot, func), 
+	r = hv_pci_config_put(sc->hs_devhandle, HVPCI_BDF(bus, slot, func), 
 			    reg, width, (pci_cfg_data_t)data);
 
 	if (r)
diff --git a/sys/sun4v/sun4v/hvcons.c b/sys/sun4v/sun4v/hvcons.c
index e0e8468..ca75ed6 100644
--- a/sys/sun4v/sun4v/hvcons.c
+++ b/sys/sun4v/sun4v/hvcons.c
@@ -48,7 +48,8 @@ __FBSDID("$FreeBSD$");
 #include "opt_simulator.h"
 
 #include <machine/resource.h>
-#include <machine/hypervisor_api.h>
+#include <machine/hypervisorvar.h>
+#include <machine/hv_api.h>
 
 #define HVCN_POLL_FREQ 10
 
@@ -102,11 +103,11 @@ hv_cnputs(char *p)
 	while ((c = *p++) != '\0') {
 		if (c == '\n') {
 			do {
-				error = hv_cnputchar('\r');
+				error = hv_cons_putchar('\r');
 			} while (error == H_EWOULDBLOCK);
 		}
 		do {
-			error = hv_cnputchar(c);
+			error = hv_cons_putchar(c);
 		} while (error == H_EWOULDBLOCK);
 	}
 }
@@ -220,7 +221,7 @@ hvcn_cngetc(struct consdev *cp)
 
 	ch = '\0';
 
-	while ((l = hv_cngetchar(&ch)) != H_EOK) {
+	while ((l = hv_cons_getchar(&ch)) != H_EOK) {
 #if defined(KDB)
 		if (l == H_BREAK || l ==  H_HUP)
 			kdb_enter("Break sequence on console");
@@ -244,7 +245,7 @@ hvcn_cncheckc(struct consdev *cp)
 	unsigned char ch;
 	int l;
 
-	if ((l = hv_cngetchar(&ch)) == H_EOK) {
+	if ((l = hv_cons_getchar(&ch)) == H_EOK) {
 #if defined(KDB)
 		if (l == H_BREAK || l ==  H_HUP)
 			kdb_enter("Break sequence on console");
@@ -273,10 +274,10 @@ hvcn_cnputc(struct consdev *cp, int c)
 	error = 0;
 	do {
 		if (c == '\n') 
-			error = hv_cnputchar('\r');
+			error = hv_cons_putchar('\r');
 	} while (error == H_EWOULDBLOCK);
 	do {
-		error = hv_cnputchar(c);
+		error = hv_cons_putchar(c);
 	} while (error == H_EWOULDBLOCK);
 }
 
@@ -303,7 +304,7 @@ hvcn_tty_start(struct tty *tp)
 				bufindex = 0;
 			}
 			while (buflen) {
-				if (hv_cnputchar(buf[bufindex]) == H_EWOULDBLOCK)
+				if (hv_cons_putchar(buf[bufindex]) == H_EWOULDBLOCK)
 					goto done;
 				bufindex++;
 				buflen--;
diff --git a/sys/sun4v/sun4v/hviommu.c b/sys/sun4v/sun4v/hviommu.c
index e9d5533..d47d534 100644
--- a/sys/sun4v/sun4v/hviommu.c
+++ b/sys/sun4v/sun4v/hviommu.c
@@ -246,7 +246,7 @@ hviommu_remove(struct hviommu *him, vm_offset_t va, vm_size_t len)
 	KASSERT((va & IO_PAGE_MASK) == 0 && (len & IO_PAGE_MASK) == 0,
 	    ("%s: va %#lx or len %#lx not page aligned", __func__, va, len));
 	while (len > 0) {
-		if ((error = hvio_iommu_demap(him->him_handle,
+		if ((error = hv_pci_iommu_demap(him->him_handle,
 		    VA_TO_TSBID(him, va), len >> IO_PAGE_SHIFT, &demapped))) {
 			printf("%s: demap: va: %#lx, npages: %#lx, err: %ld\n",
 			    __func__, va, len >> IO_PAGE_SHIFT, error);
@@ -559,7 +559,7 @@ hviommu_map_pages(struct hviommu *him, bus_addr_t dvmaddr, uint64_t *iottes, pag
 	/* push tte's */
 	cntdone = 0;
 	while (cntdone < iottecnt) {
-		if ((err = hvio_iommu_map(him->him_handle, VA_TO_TSBID(him,
+		if ((err = hv_pci_iommu_map(him->him_handle, VA_TO_TSBID(him,
 		    dvmaddr), iottecnt, PCI_MAP_ATTR_READ | PCI_MAP_ATTR_WRITE,
 		    (io_page_list_t *)pmap_kextract((vm_offset_t)&iottes[0]),
 		    &mapcnt))) {
@@ -569,7 +569,7 @@ hviommu_map_pages(struct hviommu *him, bus_addr_t dvmaddr, uint64_t *iottes, pag
 		cntdone += mapcnt;
 	}
 	for (i = 0; i < iottecnt; i++) {
-		DPRINTF("err: %ld", hvio_iommu_getmap(him->him_handle,
+		DPRINTF("err: %ld", hv_pci_iommu_getmap(him->him_handle,
 		    VA_TO_TSBID(him, dvmaddr + i * IO_PAGE_SIZE),
 						     &ioattr, &ra));
 		DPRINTF(", ioattr: %d, raddr: %#lx\n", ioattr, ra);
@@ -934,14 +934,14 @@ hviommu_dvmamap_sync(bus_dma_tag_t dt, bus_dmamap_t map, bus_dmasync_op_t op)
 		va = (vm_offset_t)BDR_START(r) + r->dr_offset ;
 		len = r->dr_used;
 		while (len > 0) {
-			if ((err = hvio_iommu_getmap(him->him_handle,
+			if ((err = hv_pci_iommu_getmap(him->him_handle,
 			    VA_TO_TSBID(him, va), &ioattr, &ra))) {
 				if (err != H_ENOMAP)
 					printf("failed to _g=etmap: err: %ld, handle: %#lx, tsbid: %#lx\n", 
 					       err, him->him_handle, VA_TO_TSBID(him, va));
 				continue;
 			}
-			if ((err = hvio_dma_sync(him->him_handle, ra,
+			if ((err = hv_pci_dma_sync(him->him_handle, ra,
 			    ulmin(len, (trunc_io_page(ra) + IO_PAGE_SIZE) - ra),
 			    iodir, &synced))) {
 				printf("failed to dma_sync: err: %ld, handle: %#lx, ra: %#lx, len: %#lx, dir: %d\n",
@@ -949,7 +949,7 @@ hviommu_dvmamap_sync(bus_dma_tag_t dt, bus_dmamap_t map, bus_dmasync_op_t op)
 				    (trunc_io_page(ra) + IO_PAGE_SIZE) - ra),
 				    iodir);
 				synced = ulmin(len, (trunc_io_page(ra) + IO_PAGE_SIZE) - ra);
-				printf("err: %ld", hvio_iommu_getmap(him->him_handle, VA_TO_TSBID(him, va),
+				printf("err: %ld", hv_pci_iommu_getmap(him->him_handle, VA_TO_TSBID(him, va),
 								     &ioattr, &raddr));
 				printf(", ioattr: %d, raddr: %#lx\n", ioattr, raddr);
 			}
diff --git a/sys/sun4v/sun4v/intr_machdep.c b/sys/sun4v/sun4v/intr_machdep.c
index cd650e5..edb5efe 100644
--- a/sys/sun4v/sun4v/intr_machdep.c
+++ b/sys/sun4v/sun4v/intr_machdep.c
@@ -79,10 +79,12 @@ __FBSDID("$FreeBSD$");
 
 #include <machine/frame.h>
 #include <machine/intr_machdep.h>
-#include <machine/hypervisor_api.h>
 #include <machine/cpu.h>
 #include <machine/smp.h>
 
+#include <machine/hypervisorvar.h>
+#include <machine/hv_api.h>
+
 #include <vm/vm.h>
 #include <vm/pmap.h>
 
@@ -307,7 +309,7 @@ intr_execute_handlers(void *cookie)
 		if (TAILQ_EMPTY(&ie->ie_handlers))
 			intr_stray_vector(iv);
 		else
-			hvio_intr_setstate(iv->iv_vec, HV_INTR_IDLE_STATE);
+			hv_intr_setstate(iv->iv_vec, HV_INTR_IDLE_STATE);
 	}
 }
 
@@ -318,7 +320,7 @@ ithread_wrapper(void *arg)
 	
 	ivh->ivh_handler(ivh->ivh_arg);
 	/* re-enable interrupt */
-	hvio_intr_setstate(ivh->ivh_vec, HV_INTR_IDLE_STATE);
+	hv_intr_setstate(ivh->ivh_vec, HV_INTR_IDLE_STATE);
 
 }
 
diff --git a/sys/sun4v/sun4v/machdep.c b/sys/sun4v/sun4v/machdep.c
index d93691b..e38283d 100644
--- a/sys/sun4v/sun4v/machdep.c
+++ b/sys/sun4v/sun4v/machdep.c
@@ -108,7 +108,7 @@ __FBSDID("$FreeBSD$");
 #include <machine/tstate.h>
 #include <machine/asm.h>
 #include <machine/ver.h>
-#include <machine/hypervisor_api.h>
+#include <machine/hv_api.h>
 
 /* XXX move this to a header */
 extern void mdesc_init(void);
diff --git a/sys/sun4v/sun4v/mp_machdep.c b/sys/sun4v/sun4v/mp_machdep.c
index 8ca6b7f..4ad7108 100644
--- a/sys/sun4v/sun4v/mp_machdep.c
+++ b/sys/sun4v/sun4v/mp_machdep.c
@@ -94,7 +94,8 @@ __FBSDID("$FreeBSD$");
 #include <machine/tte_hash.h>
 #include <machine/tsb.h>
 #include <machine/trap.h>
-#include <machine/hypervisor_api.h>
+#include <machine/hypervisorvar.h>
+#include <machine/hv_api.h>
 #include <machine/asm.h>
 
 /*
diff --git a/sys/sun4v/sun4v/nexus.c b/sys/sun4v/sun4v/nexus.c
index 6c3a393..af16e67 100644
--- a/sys/sun4v/sun4v/nexus.c
+++ b/sys/sun4v/sun4v/nexus.c
@@ -54,6 +54,9 @@ __FBSDID("$FreeBSD$");
 #include <machine/resource.h>
 #include <machine/ver.h>
 
+#include <machine/hypervisorvar.h>
+#include <machine/hv_api.h>
+
 #include <sys/rman.h>
 
 /*
@@ -329,7 +332,7 @@ nexus_setup_intr(device_t dev, device_t child, struct resource *res, int flags,
 	       ndi->ndi_devhandle, ino);
 #endif
 
-	if (hvio_intr_devino_to_sysino(ndi->ndi_devhandle, (uint32_t)ino,
+	if (hv_intr_devino_to_sysino(ndi->ndi_devhandle, (uint32_t)ino,
 	    &ihdl) != H_EOK) {
 		error = ENXIO;
 		goto fail;
@@ -346,15 +349,15 @@ nexus_setup_intr(device_t dev, device_t child, struct resource *res, int flags,
 			   intr, arg, flags, cookiep);
 
 	cpuid = 0;
-	if (hvio_intr_settarget(ihdl, cpuid) != H_EOK) {
+	if (hv_intr_settarget(ihdl, cpuid) != H_EOK) {
 		error = ENXIO;
 		goto fail;
 	}
-	if (hvio_intr_setstate(ihdl, HV_INTR_IDLE_STATE) != H_EOK) {
+	if (hv_intr_setstate(ihdl, HV_INTR_IDLE_STATE) != H_EOK) {
 		error = ENXIO;
 		goto fail;
 	}
-	if (hvio_intr_setvalid(ihdl, HV_INTR_VALID) != H_EOK) {
+	if (hv_intr_setenabled(ihdl, HV_INTR_ENABLED) != H_EOK) {
 		error = ENXIO;
 		goto fail;
 	}
diff --git a/sys/sun4v/sun4v/pmap.c b/sys/sun4v/sun4v/pmap.c
index a9e71e6..c0e2b33 100644
--- a/sys/sun4v/sun4v/pmap.c
+++ b/sys/sun4v/sun4v/pmap.c
@@ -76,6 +76,7 @@ __FBSDID("$FreeBSD$");
 #include <machine/pstate.h>
 #include <machine/tsb.h>
 
+#include <machine/hypervisorvar.h>
 #include <machine/hv_api.h>
 
 #ifdef TRAP_TRACING
@@ -419,7 +420,7 @@ pmap_activate(struct thread *td)
 
 	PCPU_SET(curpmap, pmap);
 	if (pmap->pm_context != 0)
-		if ((err = hv_set_ctxnon0(1, pmap->pm_tsb_ra)) != H_EOK)
+		if ((err = hv_mmu_tsb_ctxnon0(1, pmap->pm_tsb_ra)) != H_EOK)
 			panic("failed to set TSB 0x%lx - context == %ld\n", 
 			      pmap->pm_tsb_ra, pmap->pm_context);
 	stxa(MMU_CID_S, ASI_MMU_CONTEXTID, pmap->pm_context);
@@ -629,7 +630,7 @@ pmap_bootstrap(vm_offset_t ekva)
 	kernel_td[TSB8K_INDEX].hti_ctx_index = 0;
 	kernel_td[TSB8K_INDEX].hti_pgszs = TSB8K;
 	kernel_td[TSB8K_INDEX].hti_rsvd = 0;
-	kernel_td[TSB8K_INDEX].hti_pa = pa;
+	kernel_td[TSB8K_INDEX].hti_ra = pa;
 
 	/*
 	 * Initialize kernel's private TSB from 8K page TSB
@@ -641,7 +642,7 @@ pmap_bootstrap(vm_offset_t ekva)
 	kernel_pmap->pm_tsb.hti_ctx_index = 0;
 	kernel_pmap->pm_tsb.hti_pgszs = TSB8K;
 	kernel_pmap->pm_tsb.hti_rsvd = 0;
-	kernel_pmap->pm_tsb.hti_pa = pa;
+	kernel_pmap->pm_tsb.hti_ra = pa;
 	
 	kernel_pmap->pm_tsb_ra = vtophys((vm_offset_t)&kernel_pmap->pm_tsb);
 	tsb_set_scratchpad_kernel(&kernel_pmap->pm_tsb);
@@ -661,7 +662,7 @@ pmap_bootstrap(vm_offset_t ekva)
 	kernel_td[TSB4M_INDEX].hti_ctx_index = 0;
 	kernel_td[TSB4M_INDEX].hti_pgszs = TSB4M; 
 	kernel_td[TSB4M_INDEX].hti_rsvd = 0;
-	kernel_td[TSB4M_INDEX].hti_pa = pa;
+	kernel_td[TSB4M_INDEX].hti_ra = pa;
 
 	/*
 	 * allocate MMU fault status areas for all CPUS
@@ -726,7 +727,7 @@ pmap_bootstrap(vm_offset_t ekva)
 		}
 	}
 
-	error = hv_set_ctx0(MAX_TSB_INFO, vtophys((vm_offset_t)&kernel_td));
+	error = hv_mmu_tsb_ctx0(MAX_TSB_INFO, vtophys((vm_offset_t)&kernel_td));
 	if (error != H_EOK)
 		panic("failed to set ctx0 TSBs error: %ld", error);
 
@@ -1651,7 +1652,7 @@ pmap_pinit(pmap_t pmap)
 	pmap->pm_tsb_miss_count = pmap->pm_tsb_cap_miss_count = 0;
 	pmap->pm_active = pmap->pm_tlbactive = 0;
 	for (i = 0; i < TSB_MAX_RESIZE; i++)
-		pmap->pm_old_tsb_pa[i] = 0;
+		pmap->pm_old_tsb_ra[i] = 0;
 
 	TAILQ_INIT(&pmap->pm_pvlist);
 	PMAP_LOCK_INIT(pmap);
@@ -1960,19 +1961,19 @@ pmap_tsb_reset(pmap_t pmap)
 {
 	int i;
 
-	for (i = 1; i < TSB_MAX_RESIZE && pmap->pm_old_tsb_pa[i]; i++) {
-		pmap_free_contig_pages((void *)TLB_PHYS_TO_DIRECT(pmap->pm_old_tsb_pa[i]), 
+	for (i = 1; i < TSB_MAX_RESIZE && pmap->pm_old_tsb_ra[i]; i++) {
+		pmap_free_contig_pages((void *)TLB_PHYS_TO_DIRECT(pmap->pm_old_tsb_ra[i]), 
 				       (1 << (TSB_INIT_SHIFT + i)));
-		pmap->pm_old_tsb_pa[i] = 0;
+		pmap->pm_old_tsb_ra[i] = 0;
 	}
-	if (pmap->pm_old_tsb_pa[0] != 0) {
-		vm_paddr_t tsb_pa = pmap->pm_tsb.hti_pa;
+	if (pmap->pm_old_tsb_ra[0] != 0) {
+		vm_paddr_t tsb_pa = pmap->pm_tsb.hti_ra;
 		int size = tsb_size(&pmap->pm_tsb);
 		pmap->pm_tsb.hti_ntte = (1 << (TSB_INIT_SHIFT + PAGE_SHIFT - TTE_SHIFT));
-		pmap->pm_tsb.hti_pa = pmap->pm_old_tsb_pa[0];
+		pmap->pm_tsb.hti_ra = pmap->pm_old_tsb_ra[0];
 		pmap_free_contig_pages((void *)TLB_PHYS_TO_DIRECT(tsb_pa), size);
-		pmap->pm_tsbscratch = pmap->pm_tsb.hti_pa | (uint64_t)TSB_INIT_SHIFT;
-		pmap->pm_old_tsb_pa[0] = 0;
+		pmap->pm_tsbscratch = pmap->pm_tsb.hti_ra | (uint64_t)TSB_INIT_SHIFT;
+		pmap->pm_old_tsb_ra[0] = 0;
 	}
 }
 
@@ -2035,7 +2036,7 @@ pmap_tsb_resize(pmap_t pmap)
 	    cap_miss_count > (miss_count >> 1)) {
 		DPRINTF("resizing tsb for proc=%s pid=%d\n", 
 			curthread->td_proc->p_comm, curthread->td_proc->p_pid);
-		pmap->pm_old_tsb_pa[npages_shift - TSB_INIT_SHIFT] = pmap->pm_tsb.hti_pa;
+		pmap->pm_old_tsb_ra[npages_shift - TSB_INIT_SHIFT] = pmap->pm_tsb.hti_ra;
 
 		/* double TSB size */
 		tsb_init(&hvtsb, &tsbscratch, npages_shift + 1);
@@ -2045,7 +2046,7 @@ pmap_tsb_resize(pmap_t pmap)
 		bcopy(&hvtsb, &pmap->pm_tsb, sizeof(hv_tsb_info_t));
 		pmap->pm_tsbscratch = tsb_set_scratchpad_user(&pmap->pm_tsb);
 
-		if (hv_set_ctxnon0(1, pmap->pm_tsb_ra) != H_EOK)
+		if (hv_mmu_tsb_ctxnon0(1, pmap->pm_tsb_ra) != H_EOK)
 			panic("failed to set TSB 0x%lx - context == %ld\n", 
 			      pmap->pm_tsb_ra, pmap->pm_context);
 		info.tri_tsbscratch = pmap->pm_tsbscratch;
@@ -2055,7 +2056,7 @@ pmap_tsb_resize(pmap_t pmap)
 		spinlock_exit();
 #else 
 		bcopy(&hvtsb, &pmap->pm_tsb, sizeof(hvtsb));
-		if (hv_set_ctxnon0(1, pmap->pm_tsb_ra) != H_EOK)
+		if (hv_mmu_tsb_ctxnon0(1, pmap->pm_tsb_ra) != H_EOK)
 			panic("failed to set TSB 0x%lx - context == %ld\n", 
 			      pmap->pm_tsb_ra, pmap->pm_context);
 		pmap->pm_tsbscratch = tsb_set_scratchpad_user(&pmap->pm_tsb);
diff --git a/sys/sun4v/sun4v/rtc.c b/sys/sun4v/sun4v/rtc.c
index efeeaea..eb8c1e3 100644
--- a/sys/sun4v/sun4v/rtc.c
+++ b/sys/sun4v/sun4v/rtc.c
@@ -41,7 +41,7 @@ __FBSDID("$FreeBSD$");
 
 #include <sys/rman.h>
 
-#include <machine/hypervisor_api.h>
+#include <machine/hv_api.h>
 #include <machine/mdesc_bus.h>
 #include <machine/cddl/mdesc.h>
 #include <machine/cddl/mdesc_impl.h>
diff --git a/sys/sun4v/sun4v/simdisk.c b/sys/sun4v/sun4v/simdisk.c
index 2584b59..1320927 100644
--- a/sys/sun4v/sun4v/simdisk.c
+++ b/sys/sun4v/sun4v/simdisk.c
@@ -49,7 +49,7 @@ __FBSDID("$FreeBSD$");
 #include <dev/ofw/openfirm.h>
 
 
-#include <machine/hypervisor_api.h>
+#include <machine/hv_api.h>
 
 #define	HVD_BLOCKSIZE	512
 
diff --git a/sys/sun4v/sun4v/trap.c b/sys/sun4v/sun4v/trap.c
index 8f356da..d660eb3 100644
--- a/sys/sun4v/sun4v/trap.c
+++ b/sys/sun4v/sun4v/trap.c
@@ -90,7 +90,7 @@
 #include <machine/wstate.h>
 
 #include <machine/md_var.h>
-#include <machine/hypervisor_api.h>
+#include <machine/hv_api.h>
 
 #include <security/audit/audit.h>
 
diff --git a/sys/sun4v/sun4v/tsb.c b/sys/sun4v/sun4v/tsb.c
index 15824bb..cc8798c 100644
--- a/sys/sun4v/sun4v/tsb.c
+++ b/sys/sun4v/sun4v/tsb.c
@@ -56,7 +56,7 @@ __FBSDID("$FreeBSD$");
 #include <machine/tlb.h>
 
 CTASSERT(sizeof(tte_t) == sizeof(uint64_t));
-#define TSB_MASK(tsb) ((tsb->hvtsb_ntte) - 1)
+#define TSB_MASK(tsb) ((tsb->hti_ntte) - 1)
 /* make TSB start off at the same size as the hash */
 #define TSB_SIZE       8
 
@@ -80,16 +80,16 @@ tsb_init(hv_tsb_info_t *hvtsb, uint64_t *scratchval, uint64_t page_shift)
 		panic("vm_page_alloc_contig allocated unaligned pages: %p",
 		      ptr);
 	
-	hvtsb->hvtsb_idxpgsz = TTE8K;
-	hvtsb->hvtsb_assoc = 1;
-	hvtsb->hvtsb_ntte = (npages*PAGE_SIZE >> TTE_SHIFT);
-	hvtsb->hvtsb_ctx_index = -1;    /* TSBs aren't shared so if we don't 
+	hvtsb->hti_idxpgsz = TTE8K;
+	hvtsb->hti_assoc = 1;
+	hvtsb->hti_ntte = (npages*PAGE_SIZE >> TTE_SHIFT);
+	hvtsb->hti_ctx_index = -1;    /* TSBs aren't shared so if we don't 
 					 * set the context in the TTEs we can 
 					 * simplify miss handling slightly
 					 */
-	hvtsb->hvtsb_pgszs = TSB8K;
-	hvtsb->hvtsb_rsvd = 0;
-	hvtsb->hvtsb_pa = TLB_DIRECT_TO_PHYS((vm_offset_t)ptr);
+	hvtsb->hti_pgszs = TSB8K;
+	hvtsb->hti_rsvd = 0;
+	hvtsb->hti_ra = TLB_DIRECT_TO_PHYS((vm_offset_t)ptr);
 
 	*scratchval = ((uint64_t) ptr) | page_shift;
 }
@@ -101,7 +101,7 @@ tsb_deinit(hv_tsb_info_t *hvtsb)
 	int i;
 	
 
-	m = PHYS_TO_VM_PAGE((vm_paddr_t)hvtsb->hvtsb_pa);
+	m = PHYS_TO_VM_PAGE((vm_paddr_t)hvtsb->hti_ra);
 	for (i = 0, tm = m; i < TSB_SIZE; i++, m++) {
 		tm->wire_count--;
 		atomic_subtract_int(&cnt.v_wire_count, 1);
@@ -115,9 +115,9 @@ tsb_assert_invalid(hv_tsb_info_t *tsb, vm_offset_t va)
 {
 	vm_paddr_t tsb_load_pa;
 	uint64_t tsb_index, tsb_shift, tte_tag, tte_data;
-	tsb_shift = TTE_PAGE_SHIFT(tsb->hvtsb_idxpgsz);
+	tsb_shift = TTE_PAGE_SHIFT(tsb->hti_idxpgsz);
 	tsb_index = (va >> tsb_shift) & TSB_MASK(tsb);
-	tsb_load_pa = tsb->hvtsb_pa + 2*tsb_index*sizeof(uint64_t);
+	tsb_load_pa = tsb->hti_ra + 2*tsb_index*sizeof(uint64_t);
 	load_real_dw(tsb_load_pa, &tte_tag, &tte_data);
 	if (tte_tag == 0 && tte_data == 0)
 		return;
@@ -132,14 +132,14 @@ tsb_set_tte_real(hv_tsb_info_t *tsb, vm_offset_t va, uint64_t tte_data, uint64_t
 {
 	vm_paddr_t tsb_store_pa;
 	uint64_t tsb_index, tsb_shift, tte_tag;
-	DPRINTF("tsb_set_tte va: 0x%lx idxpgsz: %x\n", va, tsb->hvtsb_idxpgsz);
+	DPRINTF("tsb_set_tte va: 0x%lx idxpgsz: %x\n", va, tsb->hti_idxpgsz);
 
-	tsb_shift = TTE_PAGE_SHIFT(tsb->hvtsb_idxpgsz);
+	tsb_shift = TTE_PAGE_SHIFT(tsb->hti_idxpgsz);
 
 	DPRINTF("tsb_shift: 0x%lx\n", tsb_shift);
 	tsb_index = (va >> tsb_shift) & TSB_MASK(tsb);
 	DPRINTF("tsb_index_absolute: 0x%lx tsb_index: 0x%lx\n", (va >> tsb_shift), tsb_index);
-	tsb_store_pa = tsb->hvtsb_pa + 2*tsb_index*sizeof(uint64_t);
+	tsb_store_pa = tsb->hti_ra + 2*tsb_index*sizeof(uint64_t);
 
 	tte_data &= ~VTD_V;
 	/* store new value with valid bit cleared 
@@ -161,9 +161,9 @@ tsb_set_tte(hv_tsb_info_t *tsb, vm_offset_t va, uint64_t tte_data, uint64_t ctx)
 	uint64_t tsb_index, tsb_shift, tte_tag;
 	tte_t *entry;
 
-	tsb_shift = TTE_PAGE_SHIFT(tsb->hvtsb_idxpgsz);
+	tsb_shift = TTE_PAGE_SHIFT(tsb->hti_idxpgsz);
 	tsb_index = (va >> tsb_shift) & TSB_MASK(tsb);
-	entry = (tte_t *)TLB_PHYS_TO_DIRECT(tsb->hvtsb_pa + 2*tsb_index*sizeof(uint64_t));
+	entry = (tte_t *)TLB_PHYS_TO_DIRECT(tsb->hti_ra + 2*tsb_index*sizeof(uint64_t));
 	tte_tag = (ctx << TTARGET_CTX_SHIFT) | (va >> TTARGET_VA_SHIFT);
 	/* store new value with valid bit cleared 
 	 * to avoid invalid intermediate value;
@@ -179,7 +179,7 @@ tsb_set_tte(hv_tsb_info_t *tsb, vm_offset_t va, uint64_t tte_data, uint64_t ctx)
 void 
 tsb_clear(hv_tsb_info_t *tsb)
 {
-	hwblkclr((void *)TLB_PHYS_TO_DIRECT(tsb->hvtsb_pa), tsb->hvtsb_ntte << TTE_SHIFT);
+	hwblkclr((void *)TLB_PHYS_TO_DIRECT(tsb->hti_ra), tsb->hti_ntte << TTE_SHIFT);
 }
 
 void 
@@ -188,9 +188,9 @@ tsb_clear_tte(hv_tsb_info_t *tsb, vm_offset_t va)
 	tte_t *entry;
 	uint64_t tsb_index, tsb_shift;
 
-	tsb_shift = TTE_PAGE_SHIFT(tsb->hvtsb_idxpgsz);
+	tsb_shift = TTE_PAGE_SHIFT(tsb->hti_idxpgsz);
 	tsb_index = (va >> tsb_shift) & TSB_MASK(tsb);
-	entry = (tte_t *)TLB_PHYS_TO_DIRECT(tsb->hvtsb_pa + 2*tsb_index*sizeof(uint64_t));
+	entry = (tte_t *)TLB_PHYS_TO_DIRECT(tsb->hti_ra + 2*tsb_index*sizeof(uint64_t));
 	
 	*(entry + 1) = 0;
 
@@ -205,11 +205,11 @@ tsb_clear_range(hv_tsb_info_t *tsb, vm_offset_t sva, vm_offset_t eva)
 	tte_t *entry;
 
 	tsb_mask = TSB_MASK(tsb);
-	tsb_shift = TTE_PAGE_SHIFT(tsb->hvtsb_idxpgsz);
+	tsb_shift = TTE_PAGE_SHIFT(tsb->hti_idxpgsz);
 
 	for (tva = sva; tva < eva; tva += PAGE_SIZE) {
 		tsb_index = (tva >> tsb_shift) & tsb_mask;
-		entry = (tte_t *)TLB_PHYS_TO_DIRECT(tsb->hvtsb_pa + 2*tsb_index*sizeof(uint64_t));
+		entry = (tte_t *)TLB_PHYS_TO_DIRECT(tsb->hti_ra + 2*tsb_index*sizeof(uint64_t));
 		*(entry + 1) = 0;
 	}
 
@@ -222,9 +222,9 @@ tsb_get_tte(hv_tsb_info_t *tsb, vm_offset_t va)
 	tte_t *entry;
 	uint64_t tsb_index, tsb_shift, tte_tag, tte_data;
 
-	tsb_shift = TTE_PAGE_SHIFT(tsb->hvtsb_idxpgsz);
+	tsb_shift = TTE_PAGE_SHIFT(tsb->hti_idxpgsz);
 	tsb_index = (va >> tsb_shift) & TSB_MASK(tsb);
-	entry = (tte_t *)TLB_PHYS_TO_DIRECT(tsb->hvtsb_pa + 2*tsb_index*sizeof(uint64_t));
+	entry = (tte_t *)TLB_PHYS_TO_DIRECT(tsb->hti_ra + 2*tsb_index*sizeof(uint64_t));
 	tte_tag = *(entry);
 	tte_data = *(entry + 1);
 
@@ -255,8 +255,8 @@ uint64_t
 tsb_set_scratchpad_kernel(hv_tsb_info_t *tsb)
 {
 	uint64_t tsb_shift, tsb_scratch;
-	tsb_shift = ffs(tsb->hvtsb_ntte >> (PAGE_SHIFT - TTE_SHIFT)) - 1;
-	tsb_scratch = TLB_PHYS_TO_DIRECT(tsb->hvtsb_pa) | tsb_shift;
+	tsb_shift = ffs(tsb->hti_ntte >> (PAGE_SHIFT - TTE_SHIFT)) - 1;
+	tsb_scratch = TLB_PHYS_TO_DIRECT(tsb->hti_ra) | tsb_shift;
 	
 	set_tsb_kernel_scratchpad(tsb_scratch);
 	membar(Sync);
@@ -267,8 +267,8 @@ uint64_t
 tsb_set_scratchpad_user(hv_tsb_info_t *tsb)
 {
 	uint64_t tsb_shift, tsb_scratch;
-	tsb_shift = ffs(tsb->hvtsb_ntte >> (PAGE_SHIFT - TTE_SHIFT)) - 1;
-	tsb_scratch = TLB_PHYS_TO_DIRECT(tsb->hvtsb_pa) | tsb_shift;
+	tsb_shift = ffs(tsb->hti_ntte >> (PAGE_SHIFT - TTE_SHIFT)) - 1;
+	tsb_scratch = TLB_PHYS_TO_DIRECT(tsb->hti_ra) | tsb_shift;
 	set_tsb_user_scratchpad(tsb_scratch);
 	membar(Sync);
 	return tsb_scratch;
@@ -277,7 +277,7 @@ tsb_set_scratchpad_user(hv_tsb_info_t *tsb)
 int
 tsb_size(hv_tsb_info_t *hvtsb)
 {
-	return (hvtsb->hvtsb_ntte >> (PAGE_SHIFT - TTE_SHIFT));
+	return (hvtsb->hti_ntte >> (PAGE_SHIFT - TTE_SHIFT));
 }
 
 int
diff --git a/sys/sun4v/sun4v/vnex.c b/sys/sun4v/sun4v/vnex.c
index a9e57c2..89a46ea 100644
--- a/sys/sun4v/sun4v/vnex.c
+++ b/sys/sun4v/sun4v/vnex.c
@@ -43,6 +43,8 @@ __FBSDID("$FreeBSD$");
 
 #include <machine/bus.h>
 #include <machine/bus_common.h>
+#include <machine/hypervisorvar.h>
+#include <machine/hv_api.h>
 #include <machine/intr_machdep.h>
 #include <machine/nexusvar.h>
 #include <machine/resource.h>
@@ -265,24 +267,24 @@ vnex_setup_intr(device_t dev, device_t child, struct resource *res, int flags,
        
 	cfg = SUN4V_REG_SPEC2CFG_HDL(reg);
 
-	if (hvio_intr_devino_to_sysino(cfg, (uint32_t)ino, &ihdl) != H_EOK) {
+	if (hv_intr_devino_to_sysino(cfg, (uint32_t)ino, &ihdl) != H_EOK) {
 		error = ENXIO;
 		goto fail;
 	}
 
 	cpuid = 0;
 
-	if (hvio_intr_settarget(ihdl, cpuid) != H_EOK) {
+	if (hv_intr_settarget(ihdl, cpuid) != H_EOK) {
 		error = ENXIO;
 		goto fail;
 	}
 
-	if (hvio_intr_setstate(ihdl, HV_INTR_IDLE_STATE) != H_EOK) {
+	if (hv_intr_setstate(ihdl, HV_INTR_IDLE_STATE) != H_EOK) {
 		error = ENXIO;
 		goto fail;
 	}
 
-	if (hvio_intr_setvalid(ihdl, HV_INTR_VALID) != H_EOK) {
+	if (hv_intr_setenabled(ihdl, HV_INTR_ENABLED) != H_EOK) {
 		error = ENXIO;
 		goto fail;
 	}