summaryrefslogtreecommitdiffstats
path: root/sys
diff options
context:
space:
mode:
authorimp <imp@FreeBSD.org>2008-12-05 04:46:26 +0000
committerimp <imp@FreeBSD.org>2008-12-05 04:46:26 +0000
commit295197cc8def82be5fed0703e612abecbdb3cbfe (patch)
treee6c3bdcd3e659c848757c8be0ae5195e77e86277 /sys
parenta81037f424a0cfd844d241604429f6f0ce7cff72 (diff)
downloadFreeBSD-src-295197cc8def82be5fed0703e612abecbdb3cbfe.zip
FreeBSD-src-295197cc8def82be5fed0703e612abecbdb3cbfe.tar.gz
Augment comments, and move things around a smidge.
Diffstat (limited to 'sys')
-rw-r--r--sys/dev/pccbb/pccbb.c34
1 files changed, 17 insertions, 17 deletions
diff --git a/sys/dev/pccbb/pccbb.c b/sys/dev/pccbb/pccbb.c
index 5cec8f4..decafa5 100644
--- a/sys/dev/pccbb/pccbb.c
+++ b/sys/dev/pccbb/pccbb.c
@@ -946,32 +946,32 @@ cbb_cardbus_reset(device_t brdev, device_t child, int on)
/*
* Asserting reset for 20ms is necessary for most bridges. For some
- * reason, the Ricoh RF5C47x bridges need it asserted for 400ms.
+ * reason, the Ricoh RF5C47x bridges need it asserted for 400ms. The
+ * root cause of this is unknown, and NetBSD does the same thing.
*/
delay = sc->chipset == CB_RF5C47X ? 400 : 20;
PCI_MASK_CONFIG(brdev, CBBR_BRIDGECTRL, |CBBM_BRIDGECTRL_RESET, 2);
pause("cbbP3", hz * delay / 1000);
/*
- * If a card exists and we're turning it on, take it out of reset.
+ * If a card exists and we're turning it on, take it out of reset.
+ * After clearing reset, wait up to 1.1s for the first configuration
+ * register (vendor/product) configuration register of device 0.0 to
+ * become != 0xffffffff. The PCMCIA PC Card Host System Specification
+ * says that when powering up the card, the PCI Spec v2.1 must be
+ * followed. In PCI spec v2.2 Table 4-6, Trhfa (Reset High to first
+ * Config Access) is at most 2^25 clocks, or just over 1s. Section
+ * 2.2.1 states any card not ready to participate in bus transactions
+ * must tristate its outputs. Therefore, any access to its
+ * configuration registers must be ignored. In that state, the config
+ * reg will read 0xffffffff. Section 6.2.1 states a vendor id of
+ * 0xffff is invalid, so this can never match a real card. Print a
+ * warning if it never returns a real id. The PCMCIA PC Card
+ * Electrical Spec Section 5.2.7.1 implies only device 0 is present on
+ * a cardbus bus, so that's the only register we check here.
*/
if (on && CBB_CARD_PRESENT(cbb_get(sc, CBB_SOCKET_STATE))) {
/*
- * After clearing reset, wait up to 1.1s for the first
- * configuration register (vendor/product) configuration
- * register of device 0.0 to become != 0xffffffff. The PCMCIA
- * PC Card Host System Specification says that when powering
- * up the card, the PCI Spec v2.1 must be followed. In PCI
- * spec v2.2 Table 4-6, Trhfa (Reset High to first Config
- * Access) is at most 2^25 clocks, or just over 1s. Section
- * 2.2.1 states any card not ready to participate in bus
- * transactions must tristate its outputs. Therefore, any
- * access to its configuration registers must be ignored. In
- * that state, the config reg will read 0xffffffff. Section
- * 6.2.1 states a vendor id of 0xffff is invalid, so this can
- * never match a real card. Print a warning if it never
- * returns a real id. The PCMCIA PC Card Electrical Spec
- * Section 5.2.7.1 implies only device 0.
*/
PCI_MASK_CONFIG(brdev, CBBR_BRIDGECTRL,
&~CBBM_BRIDGECTRL_RESET, 2);
OpenPOWER on IntegriCloud