diff options
| author | kib <kib@FreeBSD.org> | 2012-11-01 15:14:37 +0000 |
|---|---|---|
| committer | kib <kib@FreeBSD.org> | 2012-11-01 15:14:37 +0000 |
| commit | 872b317d89fc2a1a202495e2d8321c2c50b36f8c (patch) | |
| tree | 99b84c2264319b81792fa35fb478516403ab7313 /sys/x86 | |
| parent | 38ef031b568a4353ca8698dedc3a5d73374f217c (diff) | |
| download | FreeBSD-src-872b317d89fc2a1a202495e2d8321c2c50b36f8c.zip FreeBSD-src-872b317d89fc2a1a202495e2d8321c2c50b36f8c.tar.gz | |
Provide the reading and display of the Standard Extended Features,
introduced with the IvyBridge CPUs. Provide the definitions for new
bits in CR3 and CR4 registers.
Tested by: avg, Michael Moll <kvedulv@kvedulv.de>
MFC after: 2 weeks
Diffstat (limited to 'sys/x86')
| -rw-r--r-- | sys/x86/include/specialreg.h | 11 |
1 files changed, 11 insertions, 0 deletions
diff --git a/sys/x86/include/specialreg.h b/sys/x86/include/specialreg.h index 7084e30..0f5d0b9 100644 --- a/sys/x86/include/specialreg.h +++ b/sys/x86/include/specialreg.h @@ -52,6 +52,8 @@ #define CR0_NW 0x20000000 /* Not Write-through */ #define CR0_CD 0x40000000 /* Cache Disable */ +#define CR3_PCID_SAVE 0x8000000000000000 + /* * Bits in PPro special registers */ @@ -66,7 +68,10 @@ #define CR4_PCE 0x00000100 /* Performance monitoring counter enable */ #define CR4_FXSR 0x00000200 /* Fast FPU save/restore used by OS */ #define CR4_XMM 0x00000400 /* enable SIMD/MMX2 to use except 16 */ +#define CR4_FSGSBASE 0x00010000 /* Enable FS/GS BASE accessing instructions */ +#define CR4_PCIDE 0x00020000 /* Enable Context ID */ #define CR4_XSAVE 0x00040000 /* XSETBV/XGETBV */ +#define CR4_SMEP 0x00100000 /* Supervisor-Mode Execution Prevention */ /* * Bits in AMD64 special registers. EFER is 64 bits wide. @@ -272,6 +277,12 @@ #define AMDID_COREID_SIZE 0x0000f000 #define AMDID_COREID_SIZE_SHIFT 12 +#define CPUID_STDEXT_FSGSBASE 0x00000001 +#define CPUID_STDEXT_TSC_ADJUST 0x00000002 +#define CPUID_STDEXT_SMEP 0x00000080 +#define CPUID_STDEXT_ENH_MOVSB 0x00000200 +#define CPUID_STDEXT_INVPCID 0x00000400 + /* * CPUID manufacturers identifiers */ |
