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| author | neel <neel@FreeBSD.org> | 2013-01-05 04:20:14 +0000 |
|---|---|---|
| committer | neel <neel@FreeBSD.org> | 2013-01-05 04:20:14 +0000 |
| commit | 3566a3da10ae5af4a5d937156ab8f4e9443a572b (patch) | |
| tree | ab1b7c88f264326c91cddddba28370692ac6f9f7 /sys/x86 | |
| parent | 57018d79b2ef5a40d9b3544929d50312e9c5d94a (diff) | |
| download | FreeBSD-src-3566a3da10ae5af4a5d937156ab8f4e9443a572b.zip FreeBSD-src-3566a3da10ae5af4a5d937156ab8f4e9443a572b.tar.gz | |
Add macros required to enable VMX operation on Intel processors.
Obtained from: NetApp
Diffstat (limited to 'sys/x86')
| -rw-r--r-- | sys/x86/include/specialreg.h | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/sys/x86/include/specialreg.h b/sys/x86/include/specialreg.h index 0f5d0b9..dbf9ba0 100644 --- a/sys/x86/include/specialreg.h +++ b/sys/x86/include/specialreg.h @@ -68,6 +68,7 @@ #define CR4_PCE 0x00000100 /* Performance monitoring counter enable */ #define CR4_FXSR 0x00000200 /* Fast FPU save/restore used by OS */ #define CR4_XMM 0x00000400 /* enable SIMD/MMX2 to use except 16 */ +#define CR4_VMXE 0x00002000 /* enable VMX operation (Intel-specific) */ #define CR4_FSGSBASE 0x00010000 /* Enable FS/GS BASE accessing instructions */ #define CR4_PCIDE 0x00020000 /* Enable Context ID */ #define CR4_XSAVE 0x00040000 /* XSETBV/XGETBV */ @@ -310,6 +311,7 @@ #define MSR_APICBASE 0x01b #define MSR_EBL_CR_POWERON 0x02a #define MSR_TEST_CTL 0x033 +#define MSR_IA32_FEATURE_CONTROL 0x03a #define MSR_BIOS_UPDT_TRIG 0x079 #define MSR_BBL_CR_D0 0x088 #define MSR_BBL_CR_D1 0x089 |
