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| author | jkim <jkim@FreeBSD.org> | 2011-02-25 23:14:24 +0000 |
|---|---|---|
| committer | jkim <jkim@FreeBSD.org> | 2011-02-25 23:14:24 +0000 |
| commit | a0eded8271ef911ffdc6ba82e756546a8b9d58db (patch) | |
| tree | 084cffab23f34da80475d5c1f357366f8d64e694 /sys/x86 | |
| parent | 95b5e9a623924c06a584b13f12720c5f39222303 (diff) | |
| download | FreeBSD-src-a0eded8271ef911ffdc6ba82e756546a8b9d58db.zip FreeBSD-src-a0eded8271ef911ffdc6ba82e756546a8b9d58db.tar.gz | |
Set C1 "I/O then Halt" capability bit for Intel EIST. Some broken BIOSes
refuse to load external SSDTs if this bit is unset for _PDC. It seems Linux
and OpenSolaris did the same long ago.
MFC after: 1 week
Diffstat (limited to 'sys/x86')
| -rw-r--r-- | sys/x86/cpufreq/est.c | 7 |
1 files changed, 5 insertions, 2 deletions
diff --git a/sys/x86/cpufreq/est.c b/sys/x86/cpufreq/est.c index ecca30c..678efb6 100644 --- a/sys/x86/cpufreq/est.c +++ b/sys/x86/cpufreq/est.c @@ -947,8 +947,11 @@ static int est_features(driver_t *driver, u_int *features) { - /* Notify the ACPI CPU that we support direct access to MSRs */ - *features = ACPI_CAP_PERF_MSRS; + /* + * Notify the ACPI CPU that we support direct access to MSRs. + * XXX C1 "I/O then Halt" seems necessary for some broken BIOS. + */ + *features = ACPI_CAP_PERF_MSRS | ACPI_CAP_C1_IO_HALT; return (0); } |
