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authorjimharris <jimharris@FreeBSD.org>2012-08-07 23:16:11 +0000
committerjimharris <jimharris@FreeBSD.org>2012-08-07 23:16:11 +0000
commiteaa4d133af4a97eb5e3e50612e3335aec6b30b16 (patch)
tree3aad0c4148625cce991b8733f3053fe2239ca866 /sys/x86
parent187bdeb55e1bfd6164489785cff4a64883d61576 (diff)
downloadFreeBSD-src-eaa4d133af4a97eb5e3e50612e3335aec6b30b16.zip
FreeBSD-src-eaa4d133af4a97eb5e3e50612e3335aec6b30b16.tar.gz
During TSC synchronization test, use rdtsc() rather than rdtsc32(), to
protect against 32-bit TSC overflow while the sync test is running. On dual-socket Xeon E5-2600 (SNB) systems with up to 32 threads, there is non-trivial chance (2-3%) that TSC synchronization test fails due to 32-bit TSC overflow while the synchronization test is running. Sponsored by: Intel Reviewed by: jkim Discussed with: jkim, kib
Diffstat (limited to 'sys/x86')
-rw-r--r--sys/x86/x86/tsc.c10
1 files changed, 5 insertions, 5 deletions
diff --git a/sys/x86/x86/tsc.c b/sys/x86/x86/tsc.c
index 94bd520..04231b8 100644
--- a/sys/x86/x86/tsc.c
+++ b/sys/x86/x86/tsc.c
@@ -363,11 +363,11 @@ init_TSC(void)
static void \
tsc_read_##x(void *arg) \
{ \
- uint32_t *tsc = arg; \
+ uint64_t *tsc = arg; \
u_int cpu = PCPU_GET(cpuid); \
\
__asm __volatile("cpuid" : : : "eax", "ebx", "ecx", "edx"); \
- tsc[cpu * 3 + x] = rdtsc32(); \
+ tsc[cpu * 3 + x] = rdtsc(); \
}
TSC_READ(0)
TSC_READ(1)
@@ -379,8 +379,8 @@ TSC_READ(2)
static void
comp_smp_tsc(void *arg)
{
- uint32_t *tsc;
- int32_t d1, d2;
+ uint64_t *tsc;
+ int64_t d1, d2;
u_int cpu = PCPU_GET(cpuid);
u_int i, j, size;
@@ -401,7 +401,7 @@ comp_smp_tsc(void *arg)
static int
test_smp_tsc(void)
{
- uint32_t *data, *tsc;
+ uint64_t *data, *tsc;
u_int i, size;
if (!smp_tsc && !tsc_is_invariant)
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