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authorjeff <jeff@FreeBSD.org>2008-04-11 03:26:41 +0000
committerjeff <jeff@FreeBSD.org>2008-04-11 03:26:41 +0000
commit8efb03d60e1c0395890e9ac099d156d71015b041 (patch)
tree91b4d4ec9731a09d54fc444ce35eff70bab076be /sys/sparc64
parentaff41aab585ea9a4db2a88f4299e3ad8f2f12031 (diff)
downloadFreeBSD-src-8efb03d60e1c0395890e9ac099d156d71015b041.zip
FreeBSD-src-8efb03d60e1c0395890e9ac099d156d71015b041.tar.gz
- Add the interrupt vector number to intr_event_create so MI code can
lookup hard interrupt events by number. Ignore the irq# for soft intrs. - Add support to cpuset for binding hardware interrupts. This has the side effect of binding any ithread associated with the hard interrupt. As per restrictions imposed by MD code we can only bind interrupts to a single cpu presently. Interrupts can be 'unbound' by binding them to all cpus. Reviewed by: jhb Sponsored by: Nokia
Diffstat (limited to 'sys/sparc64')
-rw-r--r--sys/sparc64/sparc64/intr_machdep.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/sys/sparc64/sparc64/intr_machdep.c b/sys/sparc64/sparc64/intr_machdep.c
index f2dfa48..c771b6a 100644
--- a/sys/sparc64/sparc64/intr_machdep.c
+++ b/sys/sparc64/sparc64/intr_machdep.c
@@ -282,7 +282,7 @@ intr_controller_register(int vec, const struct intr_controller *ic,
* CPU as long as the source of a level sensitive interrupt is
* not cleared.
*/
- error = intr_event_create(&ie, iv, 0, NULL, intr_enable_eoi,
+ error = intr_event_create(&ie, iv, 0, vec, NULL, intr_enable_eoi,
intr_enable_eoi, NULL, "vec%d:", vec);
if (error != 0)
return (error);
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