MFC: r292943, r292960

- (Ab)use udivx for dividing the u_int pc_cpuid when implementing
  CPU_ISSET(), CPU_SET() etc. in sparc64 asm. This approach has the
  benefit of not clobbering %y, allowing to revert r222827 and
  partially r222828.
- In r222828, CATR() already was changed to use the equivalent of
  PCPU_GET(cpuid) instead of the MD module ID for KTR_MASK, so
  belatedly also catch up with KTR_CPU and the C side of ktr(9).
  Originally, in r203838 CATR() was moved away from directly reading
  the module ID or equivalent as that became impractical with other
  CPU types than USI/II supported. With r222828 in place, per-CPU
  data generally is set up soon enough, though, that employing
  PCPU things in ktr(9) also for use during early stages works.
- Unfortunately, an exception to the latter is the ktr(9) use
  in pmap_bootstrap(), which actually is run so early that even
  checking for bootverbose being set via the loader doesn't work.
  Consequently, replace the ktr(9) use in pmap_bootstrap() with
  OF_printf(9) and put it under #ifdef DIAGNOSTIC instead.

5 files changed, 69 insertions, 90 deletions

diff --git a/sys/sparc64/include/ktr.h b/sys/sparc64/include/ktr.h
index 0a7f0e1..e7c6112 100644
--- a/sys/sparc64/include/ktr.h
+++ b/sys/sparc64/include/ktr.h
@@ -34,14 +34,10 @@
 
 #include <sys/ktr.h>
 
-#ifndef LOCORE
-
-#define	KTR_CPU	PCPU_GET(mid)
-
-#else
+#ifdef LOCORE
 
 /*
- * XXX could really use another register...
+ * XXX could really use another register ...
  */
 #define	ATR(desc, r1, r2, r3, l1, l2) \
 	.sect	.rodata ; \
@@ -63,16 +59,13 @@ l2:	add	r2, 1, r3 ; \
 	add	r1, r2, r1 ; \
 	rd	%tick, r2 ; \
 	stx	r2, [r1 + KTR_TIMESTAMP] ; \
-	lduw	[PCPU(MID)], r2 ; \
+	lduw	[PCPU(CPUID)], r2 ; \
 	stw	r2, [r1 + KTR_CPU] ; \
 	stw	%g0, [r1 + KTR_LINE] ; \
 	stx	%g0, [r1 + KTR_FILE] ; \
 	SET(l1 ## b, r3, r2) ; \
 	stx	r2, [r1 + KTR_DESC]
 
-/*
- * NB: this clobbers %y.
- */
 #define CATR(mask, desc, r1, r2, r3, l1, l2, l3) \
 	set	mask, r1 ; \
 	SET(ktr_mask, r3, r2) ; \
@@ -82,16 +75,14 @@ l2:	add	r2, 1, r3 ; \
 	 nop ; \
 	lduw	[PCPU(CPUID)], r2 ; \
 	mov	_NCPUBITS, r3 ; \
-	mov	%g0, %y ; \
-	udiv	r2, r3, r2 ; \
+	udivx	r2, r3, r2 ; \
 	srl	r2, 0, r2 ; \
 	sllx	r2, PTR_SHIFT, r2 ; \
 	SET(ktr_cpumask, r3, r1) ; \
 	ldx	[r1 + r2], r1 ; \
 	lduw	[PCPU(CPUID)], r2 ; \
 	mov	_NCPUBITS, r3 ; \
-	mov	%g0, %y ; \
-	udiv	r2, r3, r2 ; \
+	udivx	r2, r3, r2 ; \
 	srl	r2, 0, r2 ; \
 	smul	r2, r3, r3 ; \
 	lduw	[PCPU(CPUID)], r2 ; \
diff --git a/sys/sparc64/sparc64/exception.S b/sys/sparc64/sparc64/exception.S
index 09db4e0..ba571cf 100644
--- a/sys/sparc64/sparc64/exception.S
+++ b/sys/sparc64/sparc64/exception.S
@@ -2627,9 +2627,9 @@ ENTRY(tl0_ret)
 	andn	%l4, TSTATE_CWP_MASK, %g2
 
 	/*
-	 * Save %y in an alternate global.
+	 * Restore %y.  Could also be below if we had more alternate globals.
 	 */
-	mov	%l5, %g4
+	wr	%l5, 0, %y
 
 	/*
 	 * Setup %wstate for return.  We need to restore the user window state
@@ -2674,8 +2674,8 @@ tl0_ret_fill:
 	 * Fixup %tstate so the saved %cwp points to the current window and
 	 * restore it.
 	 */
-	rdpr	%cwp, %g1
-	wrpr	%g2, %g1, %tstate
+	rdpr	%cwp, %g4
+	wrpr	%g2, %g4, %tstate
 
 	/*
 	 * Restore the user window state.  The transition bit was set above
@@ -2685,25 +2685,20 @@ tl0_ret_fill:
 
 #if KTR_COMPILE & KTR_TRAP
 	CATR(KTR_TRAP, "tl0_ret: td=%#lx pil=%#lx pc=%#lx npc=%#lx sp=%#lx"
-	    , %g1, %g2, %g3, 7, 8, 9)
-	ldx	[PCPU(CURTHREAD)], %g2
-	stx	%g2, [%g1 + KTR_PARM1]
-	rdpr	%pil, %g2
-	stx	%g2, [%g1 + KTR_PARM2]
-	rdpr	%tpc, %g2
-	stx	%g2, [%g1 + KTR_PARM3]
-	rdpr	%tnpc, %g2
-	stx	%g2, [%g1 + KTR_PARM4]
-	stx	%sp, [%g1 + KTR_PARM5]
+	    , %g2, %g3, %g4, 7, 8, 9)
+	ldx	[PCPU(CURTHREAD)], %g3
+	stx	%g3, [%g2 + KTR_PARM1]
+	rdpr	%pil, %g3
+	stx	%g3, [%g2 + KTR_PARM2]
+	rdpr	%tpc, %g3
+	stx	%g3, [%g2 + KTR_PARM3]
+	rdpr	%tnpc, %g3
+	stx	%g3, [%g2 + KTR_PARM4]
+	stx	%sp, [%g2 + KTR_PARM5]
 9:
 #endif
 
 	/*
-	 * Restore %y.  Note that the CATR above clobbered it.
-	 */
-	wr	%g4, 0, %y
-
-	/*
 	 * Return to usermode.
 	 */
 	retry
@@ -2717,11 +2712,6 @@ tl0_ret_fill_end:
 	stx	%l6, [%l0 + KTR_PARM2]
 	stx	%sp, [%l0 + KTR_PARM3]
 9:
-
-	/*
-	 * Restore %y clobbered by the CATR.  This was saved in %l5 above.
-	 */
-	wr	%l5, 0, %y
 #endif
 
 	/*
@@ -2889,36 +2879,34 @@ ENTRY(tl1_ret)
 	andn	%l0, TSTATE_CWP_MASK, %g1
 	mov	%l1, %g2
 	mov	%l2, %g3
-	mov	%l4, %g4
 
 	wrpr	%l3, 0, %pil
+	wr	%l4, 0, %y
 
 	restore
 
 	wrpr	%g0, 2, %tl
 
+	rdpr	%cwp, %g4
+	wrpr	%g1, %g4, %tstate
 	wrpr	%g2, 0, %tpc
 	wrpr	%g3, 0, %tnpc
-	rdpr	%cwp, %g2
-	wrpr	%g1, %g2, %tstate
 
 #if KTR_COMPILE & KTR_TRAP
 	CATR(KTR_TRAP, "tl1_ret: td=%#lx pil=%#lx ts=%#lx pc=%#lx sp=%#lx"
-	    , %g1, %g2, %g3, 7, 8, 9)
-	ldx	[PCPU(CURTHREAD)], %g2
-	stx	%g2, [%g1 + KTR_PARM1]
-	rdpr	%pil, %g2
-	stx	%g2, [%g1 + KTR_PARM2]
-	rdpr	%tstate, %g2
-	stx	%g2, [%g1 + KTR_PARM3]
-	rdpr	%tpc, %g2
-	stx	%g2, [%g1 + KTR_PARM4]
-	stx	%sp, [%g1 + KTR_PARM5]
+	    , %g2, %g3, %g4, 7, 8, 9)
+	ldx	[PCPU(CURTHREAD)], %g3
+	stx	%g3, [%g2 + KTR_PARM1]
+	rdpr	%pil, %g3
+	stx	%g3, [%g2 + KTR_PARM2]
+	rdpr	%tstate, %g3
+	stx	%g3, [%g2 + KTR_PARM3]
+	rdpr	%tpc, %g3
+	stx	%g3, [%g2 + KTR_PARM4]
+	stx	%sp, [%g2 + KTR_PARM5]
 9:
 #endif
 
-	wr	%g4, 0, %y
-
 	retry
 END(tl1_ret)
 
@@ -3019,35 +3007,33 @@ ENTRY(tl1_intr)
 	andn	%l0, TSTATE_CWP_MASK, %g1
 	mov	%l1, %g2
 	mov	%l2, %g3
-	mov	%l4, %g4
 	wrpr	%l3, 0, %pil
+	wr	%l4, 0, %y
 
 	restore
 
 	wrpr	%g0, 2, %tl
 
+	rdpr	%cwp, %g4
+	wrpr	%g1, %g4, %tstate
 	wrpr	%g2, 0, %tpc
 	wrpr	%g3, 0, %tnpc
-	rdpr	%cwp, %g2
-	wrpr	%g1, %g2, %tstate
 
 #if KTR_COMPILE & KTR_INTR
 	CATR(KTR_INTR, "tl1_intr: td=%#x pil=%#lx ts=%#lx pc=%#lx sp=%#lx"
-	    , %g1, %g2, %g3, 7, 8, 9)
-	ldx	[PCPU(CURTHREAD)], %g2
-	stx	%g2, [%g1 + KTR_PARM1]
-	rdpr	%pil, %g2
-	stx	%g2, [%g1 + KTR_PARM2]
-	rdpr	%tstate, %g2
-	stx	%g2, [%g1 + KTR_PARM3]
-	rdpr	%tpc, %g2
-	stx	%g2, [%g1 + KTR_PARM4]
-	stx	%sp, [%g1 + KTR_PARM5]
+	    , %g2, %g3, %g4, 7, 8, 9)
+	ldx	[PCPU(CURTHREAD)], %g3
+	stx	%g3, [%g2 + KTR_PARM1]
+	rdpr	%pil, %g3
+	stx	%g3, [%g2 + KTR_PARM2]
+	rdpr	%tstate, %g3
+	stx	%g3, [%g2 + KTR_PARM3]
+	rdpr	%tpc, %g3
+	stx	%g3, [%g2 + KTR_PARM4]
+	stx	%sp, [%g2 + KTR_PARM5]
 9:
 #endif
 
-	wr	%g4, 0, %y
-
 	retry
 END(tl1_intr)
 
diff --git a/sys/sparc64/sparc64/mp_exception.S b/sys/sparc64/sparc64/mp_exception.S
index 54a5e4d..9bd61b9 100644
--- a/sys/sparc64/sparc64/mp_exception.S
+++ b/sys/sparc64/sparc64/mp_exception.S
@@ -38,12 +38,10 @@ __FBSDID("$FreeBSD$");
 	.register	%g2, #ignore
 	.register	%g3, #ignore
 
-#define	IPI_DONE(r1, r2, r3, r4, r5, r6)				\
-	rd	%y, r6 ;						\
+#define	IPI_DONE(r1, r2, r3, r4, r5)					\
 	lduw	[PCPU(CPUID)], r2 ;					\
 	mov	_NCPUBITS, r3 ;						\
-	mov	%g0, %y ;						\
-	udiv	r2, r3, r4 ;						\
+	udivx	r2, r3, r4 ;						\
 	srl	r4, 0, r5 ;						\
 	sllx	r5, PTR_SHIFT, r5 ;					\
 	add	r1, r5, r1 ;						\
@@ -51,7 +49,6 @@ __FBSDID("$FreeBSD$");
 	sub	r2, r3, r3 ;						\
 	mov	1, r4 ;							\
 	sllx	r4, r3, r4 ;						\
-	wr	r6, %y ;						\
 	ATOMIC_CLEAR_LONG(r1, r2, r3, r4)
 
 /*
@@ -89,7 +86,7 @@ ENTRY(tl_ipi_spitfire_dcache_page_inval)
 2:	brgz,pt	%g2, 1b
 	 sub	%g2, %g4, %g2
 
-	IPI_DONE(%g5, %g1, %g2, %g3, %g4, %g6)
+	IPI_DONE(%g5, %g1, %g2, %g3, %g4)
 	retry
 END(tl_ipi_spitfire_dcache_page_inval)
 
@@ -129,7 +126,7 @@ ENTRY(tl_ipi_spitfire_icache_page_inval)
 2:	brgz,pt	%g2, 1b
 	 sub	%g2, %g4, %g2
 
-	IPI_DONE(%g5, %g1, %g2, %g3, %g4, %g6)
+	IPI_DONE(%g5, %g1, %g2, %g3, %g4)
 	retry
 END(tl_ipi_spitfire_icache_page_inval)
 
@@ -160,7 +157,7 @@ ENTRY(tl_ipi_cheetah_dcache_page_inval)
 	blt,a,pt %xcc, 1b
 	 nop
 
-	IPI_DONE(%g5, %g1, %g2, %g3, %g4, %g6)
+	IPI_DONE(%g5, %g1, %g2, %g3, %g4)
 	retry
 END(tl_ipi_cheetah_dcache_page_inval)
 
@@ -216,7 +213,7 @@ ENTRY(tl_ipi_tlb_page_demap)
 	stxa	%g0, [%g2] ASI_IMMU_DEMAP
 	flush	%g3
 
-	IPI_DONE(%g5, %g1, %g2, %g3, %g4, %g6)
+	IPI_DONE(%g5, %g1, %g2, %g3, %g4)
 	retry
 END(tl_ipi_tlb_page_demap)
 
@@ -259,7 +256,7 @@ ENTRY(tl_ipi_tlb_range_demap)
 	blt,a,pt %xcc, 1b
 	 sethi	%hi(KERNBASE), %g6
 
-	IPI_DONE(%g5, %g1, %g2, %g3, %g4, %g6)
+	IPI_DONE(%g5, %g1, %g2, %g3, %g4)
 	retry
 END(tl_ipi_tlb_range_demap)
 
@@ -283,7 +280,7 @@ ENTRY(tl_ipi_tlb_context_demap)
 	stxa	%g0, [%g1] ASI_IMMU_DEMAP
 	flush	%g3
 
-	IPI_DONE(%g5, %g1, %g2, %g3, %g4, %g6)
+	IPI_DONE(%g5, %g1, %g2, %g3, %g4)
 	retry
 END(tl_ipi_tlb_context_demap)
 
@@ -295,7 +292,7 @@ ENTRY(tl_ipi_stick_rd)
 	rd	%asr24, %g2
 	stx	%g2, [%g1]
 
-	IPI_DONE(%g5, %g1, %g2, %g3, %g4, %g6)
+	IPI_DONE(%g5, %g1, %g2, %g3, %g4)
 	retry
 END(tl_ipi_stick_rd)
 
@@ -307,6 +304,6 @@ ENTRY(tl_ipi_tick_rd)
 	rd	%tick, %g2
 	stx	%g2, [%g1]
 
-	IPI_DONE(%g5, %g1, %g2, %g3, %g4, %g6)
+	IPI_DONE(%g5, %g1, %g2, %g3, %g4)
 	retry
 END(tl_ipi_tick_rd)
diff --git a/sys/sparc64/sparc64/pmap.c b/sys/sparc64/sparc64/pmap.c
index 9073760..c138ef9 100644
--- a/sys/sparc64/sparc64/pmap.c
+++ b/sys/sparc64/sparc64/pmap.c
@@ -345,14 +345,18 @@ pmap_bootstrap(u_int cpu_impl)
 	if (OF_getprop(pmem, "available", mra, sz) == -1)
 		OF_panic("%s: getprop /memory/available", __func__);
 	sz /= sizeof(*mra);
-	CTR0(KTR_PMAP, "pmap_bootstrap: physical memory");
+#ifdef DIAGNOSTIC
+	OF_printf("pmap_bootstrap: physical memory\n");
+#endif
 	qsort(mra, sz, sizeof (*mra), mr_cmp);
 	physsz = 0;
 	getenv_quad("hw.physmem", &physmem);
 	physmem = btoc(physmem);
 	for (i = 0, j = 0; i < sz; i++, j += 2) {
-		CTR2(KTR_PMAP, "start=%#lx size=%#lx", mra[i].mr_start,
+#ifdef DIAGNOSTIC
+		OF_printf("start=%#lx size=%#lx\n", mra[i].mr_start,
 		    mra[i].mr_size);
+#endif
 		if (physmem != 0 && btoc(physsz + mra[i].mr_size) >= physmem) {
 			if (btoc(physsz) < physmem) {
 				phys_avail[j] = mra[i].mr_start;
@@ -616,13 +620,16 @@ pmap_bootstrap(u_int cpu_impl)
 		    __func__);
 	sz /= sizeof(*translations);
 	translations_size = sz;
-	CTR0(KTR_PMAP, "pmap_bootstrap: translations");
+#ifdef DIAGNOSTIC
+	OF_printf("pmap_bootstrap: translations\n");
+#endif
 	qsort(translations, sz, sizeof (*translations), om_cmp);
 	for (i = 0; i < sz; i++) {
-		CTR3(KTR_PMAP,
-		    "translation: start=%#lx size=%#lx tte=%#lx",
+#ifdef DIAGNOSTIC
+		OF_printf("translation: start=%#lx size=%#lx tte=%#lx\n",
 		    translations[i].om_start, translations[i].om_size,
 		    translations[i].om_tte);
+#endif
 		if ((translations[i].om_tte & TD_V) == 0)
 			continue;
 		if (translations[i].om_start < VM_MIN_PROM_ADDRESS ||
diff --git a/sys/sparc64/sparc64/swtch.S b/sys/sparc64/sparc64/swtch.S
index 22db805..49d3cf5 100644
--- a/sys/sparc64/sparc64/swtch.S
+++ b/sys/sparc64/sparc64/swtch.S
@@ -173,8 +173,7 @@ ENTRY(cpu_switch)
 	 * active on this CPU.
 	 */
 	mov	_NCPUBITS, %l5
-	mov	%g0, %y
-	udiv	%l3, %l5, %l6
+	udivx	%l3, %l5, %l6
 	srl	%l6, 0, %l4
 	sllx	%l4, PTR_SHIFT, %l4
 	add	%l4, PM_ACTIVE, %l4
@@ -242,8 +241,7 @@ ENTRY(cpu_switch)
 	 * Mark the pmap as active on this CPU.
 	 */
 	mov	_NCPUBITS, %l5
-	mov	%g0, %y
-	udiv	%l3, %l5, %l6
+	udivx	%l3, %l5, %l6
 	srl	%l6, 0, %l4
 	sllx	%l4, PTR_SHIFT, %l4
 	add	%l4, PM_ACTIVE, %l4