diff options
| author | tmm <tmm@FreeBSD.org> | 2002-03-11 03:03:35 +0000 |
|---|---|---|
| committer | tmm <tmm@FreeBSD.org> | 2002-03-11 03:03:35 +0000 |
| commit | 4667cf8132c0234b67f21d702b03eb7c79fc38ae (patch) | |
| tree | f19d7365dd6508437869abc07410e10c48d5d521 /sys/sparc64 | |
| parent | 9d0a7ccb856a0611e5f9953cdce30b103e77ab21 (diff) | |
| download | FreeBSD-src-4667cf8132c0234b67f21d702b03eb7c79fc38ae.zip FreeBSD-src-4667cf8132c0234b67f21d702b03eb7c79fc38ae.tar.gz | |
Add convenience macros to extract the cc0 and cc1 from format 2 and 3
instructions.
Diffstat (limited to 'sys/sparc64')
| -rw-r--r-- | sys/sparc64/include/instr.h | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/sys/sparc64/include/instr.h b/sys/sparc64/include/instr.h index 7145e40..edb300e 100644 --- a/sys/sparc64/include/instr.h +++ b/sys/sparc64/include/instr.h @@ -61,6 +61,8 @@ #define IF_F2_CC1_BITS 1 #define IF_F2_CC0_SHIFT 20 #define IF_F2_CC0_BITS 1 +#define IF_F2_CC_SHIFT 20 /* CC0 and CC1 combined. */ +#define IF_F2_CC_BITS 2 #define IF_F2_D16HI_SHIFT 20 #define IF_F2_D16HI_BITS 2 #define IF_F2_P_SHIFT 19 @@ -81,6 +83,8 @@ #define IF_F3_CC1_BITS 1 #define IF_F3_CC0_SHIFT 25 #define IF_F3_CC0_BITS 1 +#define IF_F3_CC_SHIFT 25 /* CC0 and CC1 combined. */ +#define IF_F3_CC_BITS 2 #define IF_F3_RS1_SHIFT IF_F2_RS1_SHIFT #define IF_F3_RS1_BITS IF_F2_RS1_BITS #define IF_F3_I_SHIFT 13 @@ -170,6 +174,7 @@ #define IF_F2_OP2(i) IF_DECODE((i), F2_OP2) #define IF_F2_CC1(i) IF_DECODE((i), F2_CC1) #define IF_F2_CC0(i) IF_DECODE((i), F2_CC0) +#define IF_F2_CC(i) IF_DECODE((i), F2_CC) #define IF_F2_D16HI(i) IF_DECODE((i), F2_D16HI) #define IF_F2_P(i) IF_DECODE((i), F2_P) #define IF_F2_RS1(i) IF_DECODE((i), F2_RS1) @@ -180,6 +185,7 @@ #define IF_F3_FCN(i) IF_DECODE((i), F3_FCN) #define IF_F3_CC1(i) IF_DECODE((i), F3_CC1) #define IF_F3_CC0(i) IF_DECODE((i), F3_CC0) +#define IF_F3_CC(i) IF_DECODE((i), F3_CC) #define IF_F3_RS1(i) IF_F2_RS1((i)) #define IF_F3_I(i) IF_DECODE((i), F3_I) #define IF_F3_X(i) IF_DECODE((i), F3_X) |
