Remove code to lock the user tsb into the tlb. We can handle faults on it

now, as we do for normal wired kernel memory.

5 files changed, 4 insertions, 49 deletions

diff --git a/sys/sparc64/include/pmap.h b/sys/sparc64/include/pmap.h
index 05f0e23..2a73bc0 100644
--- a/sys/sparc64/include/pmap.h
+++ b/sys/sparc64/include/pmap.h
@@ -68,7 +68,6 @@ struct md_page {
 struct pmap {
 	TAILQ_HEAD(,pv_entry) pm_pvlist;
 	struct	tte *pm_tsb;
-	struct	tte *pm_tsb_tte;
 	vm_object_t pm_tsb_obj;
 	u_int	pm_active;
 	u_int	pm_context;
diff --git a/sys/sparc64/sparc64/genassym.c b/sys/sparc64/sparc64/genassym.c
index 6044d6a..edbfabe 100644
--- a/sys/sparc64/sparc64/genassym.c
+++ b/sys/sparc64/sparc64/genassym.c
@@ -211,7 +211,6 @@ ASSYM(VM_PMAP, offsetof(struct vmspace, vm_pmap));
 ASSYM(PM_ACTIVE, offsetof(struct pmap, pm_active));
 ASSYM(PM_CONTEXT, offsetof(struct pmap, pm_context));
 ASSYM(PM_TSB, offsetof(struct pmap, pm_tsb));
-ASSYM(PM_TSB_TTE, offsetof(struct pmap, pm_tsb_tte));
 
 ASSYM(FP_FB0, offsetof(struct fpstate, fp_fb[0]));
 ASSYM(FP_FB1, offsetof(struct fpstate, fp_fb[1]));
diff --git a/sys/sparc64/sparc64/pmap.c b/sys/sparc64/sparc64/pmap.c
index d2802dc..9bd5aeb 100644
--- a/sys/sparc64/sparc64/pmap.c
+++ b/sys/sparc64/sparc64/pmap.c
@@ -1062,7 +1062,6 @@ pmap_pinit0(pmap_t pm)
 	pm->pm_count = 1;
 	pm->pm_tsb = NULL;
 	pm->pm_tsb_obj = NULL;
-	pm->pm_tsb_tte = NULL;
 	TAILQ_INIT(&pm->pm_pvlist);
 	bzero(&pm->pm_stats, sizeof(pm->pm_stats));
 }
@@ -1082,7 +1081,6 @@ pmap_pinit(pmap_t pm)
 	if (pm->pm_tsb == NULL) {
 		pm->pm_tsb = (struct tte *)kmem_alloc_pageable(kernel_map,
 		    PAGE_SIZE_8K);
-		pm->pm_tsb_tte = tsb_kvtotte((vm_offset_t)pm->pm_tsb);
 	}
 
 	/*
@@ -1725,7 +1723,6 @@ pmap_activate(struct thread *td)
 {
 	vm_offset_t tsb;
 	u_long context;
-	u_long data;
 	pmap_t pm;
 
 	/*
@@ -1734,24 +1731,16 @@ pmap_activate(struct thread *td)
 	 */
 	pm = &td->td_proc->p_vmspace->vm_pmap;
 	context = pm->pm_context;
-	data = pm->pm_tsb_tte->tte_data;
 	tsb = (vm_offset_t)pm->pm_tsb;
 
 	KASSERT(context != 0, ("pmap_activate: activating nucleus context"));
 	KASSERT(context != -1, ("pmap_activate: steal context"));
 	KASSERT(pm->pm_active == 0, ("pmap_activate: pmap already active?"));
 
-	pm->pm_active |= PCPU_GET(cpumask);
-
 	wrpr(pstate, 0, PSTATE_MMU);
-	__asm __volatile("mov %0, %%g7" : : "r" (tsb));
+	mov(tsb, TSB_REG);
 	wrpr(pstate, 0, PSTATE_NORMAL);
-	stxa(TLB_DEMAP_VA(tsb) | TLB_DEMAP_NUCLEUS | TLB_DEMAP_PAGE,
-	    ASI_DMMU_DEMAP, 0);
-	membar(Sync);
-	stxa(AA_DMMU_TAR, ASI_DMMU, tsb);
-	stxa(0, ASI_DTLB_DATA_IN_REG, data | TD_L);
-	membar(Sync);
+	pm->pm_active |= 1 << PCPU_GET(cpuid);
 	stxa(AA_DMMU_PCXR, ASI_DMMU, context);
 	membar(Sync);
 	wrpr(pstate, 0, PSTATE_KERNEL);
diff --git a/sys/sparc64/sparc64/swtch.S b/sys/sparc64/sparc64/swtch.S
index 60a8e47..877d123 100644
--- a/sys/sparc64/sparc64/swtch.S
+++ b/sys/sparc64/sparc64/swtch.S
@@ -190,27 +190,11 @@ ENTRY(cpu_switch)
 	stw	%o3, [%o2 + VM_PMAP + PM_ACTIVE]
 
 	/*
-	 * Load the address of the user tsb and the tte data that maps it into
-	 * kernel space and set the lock bit.
+	 * Switch to mmu globals and install the preloaded tsb pointer.
 	 */
 	ldx	[%o2 + VM_PMAP + PM_TSB], %o3
-	ldx	[%o2 + VM_PMAP + PM_TSB_TTE], %o4
-	ldx	[%o4 + TTE_DATA], %o4
-	or	%o4, TD_L, %o4
-
-	/*
-	 * Switch to mmu globals, install the preloaded tsb pointer and map
-	 * the new tsb.  We also disable interrupts so that this is as atomic
-	 * as can be.
-	 */
 	wrpr	%g0, PSTATE_MMU, %pstate
 	mov	%o3, TSB_REG
-	or	%o3, TLB_DEMAP_NUCLEUS | TLB_DEMAP_PAGE, %o5
-	stxa	%g0, [%o5] ASI_DMMU_DEMAP
-	mov	AA_DMMU_TAR, %o5
-	stxa	%o3, [%o5] ASI_DMMU
-	stxa	%o4, [%g0] ASI_DTLB_DATA_IN_REG
-	membar	#Sync
 	wrpr	%g0, PSTATE_KERNEL, %pstate
 
 	/*
diff --git a/sys/sparc64/sparc64/swtch.s b/sys/sparc64/sparc64/swtch.s
index 60a8e47..877d123 100644
--- a/sys/sparc64/sparc64/swtch.s
+++ b/sys/sparc64/sparc64/swtch.s
@@ -190,27 +190,11 @@ ENTRY(cpu_switch)
 	stw	%o3, [%o2 + VM_PMAP + PM_ACTIVE]
 
 	/*
-	 * Load the address of the user tsb and the tte data that maps it into
-	 * kernel space and set the lock bit.
+	 * Switch to mmu globals and install the preloaded tsb pointer.
 	 */
 	ldx	[%o2 + VM_PMAP + PM_TSB], %o3
-	ldx	[%o2 + VM_PMAP + PM_TSB_TTE], %o4
-	ldx	[%o4 + TTE_DATA], %o4
-	or	%o4, TD_L, %o4
-
-	/*
-	 * Switch to mmu globals, install the preloaded tsb pointer and map
-	 * the new tsb.  We also disable interrupts so that this is as atomic
-	 * as can be.
-	 */
 	wrpr	%g0, PSTATE_MMU, %pstate
 	mov	%o3, TSB_REG
-	or	%o3, TLB_DEMAP_NUCLEUS | TLB_DEMAP_PAGE, %o5
-	stxa	%g0, [%o5] ASI_DMMU_DEMAP
-	mov	AA_DMMU_TAR, %o5
-	stxa	%o3, [%o5] ASI_DMMU
-	stxa	%o4, [%g0] ASI_DTLB_DATA_IN_REG
-	membar	#Sync
 	wrpr	%g0, PSTATE_KERNEL, %pstate
 
 	/*