Update for the fact that the first members of the IPI args structures and

pc_cpumask were changed to cpuset_t. This now calculates the cpumask based
on pc_cpuid itself as pc_cpumask is slated for being deorbited. Note that
this needs r221750 to be MFC'ed in order to compile.
This seems to work fine but after a few dozens of successful IPIs something
suddenly adds pc_cpuid to pc_other_cpus, causing the respective assertions
in mp_machdep.c to be triggered when the latter is used as the base for the
targets.

2 files changed, 21 insertions, 12 deletions

diff --git a/sys/sparc64/sparc64/genassym.c b/sys/sparc64/sparc64/genassym.c
index 752f38b..2d1e901 100644
--- a/sys/sparc64/sparc64/genassym.c
+++ b/sys/sparc64/sparc64/genassym.c
@@ -164,7 +164,6 @@ ASSYM(MAXCOMLEN, MAXCOMLEN);
 ASSYM(PC_CURTHREAD, offsetof(struct pcpu, pc_curthread));
 ASSYM(PC_CURPCB, offsetof(struct pcpu, pc_curpcb));
 ASSYM(PC_CPUID, offsetof(struct pcpu, pc_cpuid));
-ASSYM(PC_CPUMASK, offsetof(struct pcpu, pc_cpumask));
 ASSYM(PC_IRHEAD, offsetof(struct pcpu, pc_irhead));
 ASSYM(PC_IRTAIL, offsetof(struct pcpu, pc_irtail));
 ASSYM(PC_IRFREE, offsetof(struct pcpu, pc_irfree));
diff --git a/sys/sparc64/sparc64/mp_exception.S b/sys/sparc64/sparc64/mp_exception.S
index 5a8a105..d378035 100644
--- a/sys/sparc64/sparc64/mp_exception.S
+++ b/sys/sparc64/sparc64/mp_exception.S
@@ -38,9 +38,19 @@ __FBSDID("$FreeBSD$");
 	.register	%g2, #ignore
 	.register	%g3, #ignore
 
-#define	IPI_DONE(r1, r2, r3, r4) \
-	lduw	[PCPU(CPUMASK)], r4 ;  \
-	ATOMIC_CLEAR_INT(r1, r2, r3, r4)
+#define	IPI_DONE(r1, r2, r3, r4, r5)					\
+	lduw	[PCPU(CPUID)], r2 ;					\
+	mov	_NCPUBITS, r3 ;						\
+	mov	%g0, %y ;						\
+	udiv	r2, r3, r4 ;						\
+	srl	r4, 0, r5 ;						\
+	sllx	r5, PTR_SHIFT, r5 ;					\
+	add	r1, r5, r1 ;						\
+	smul	r4, r3, r3 ;						\
+	sub	r2, r3, r3 ;						\
+	mov	1, r4 ;							\
+	sllx	r4, r3, r4 ;						\
+	ATOMIC_CLEAR_LONG(r1, r2, r3, r4)
 
 /*
  * Invalidate a physical page in the data cache.  For UltraSPARC I and II.
@@ -77,7 +87,7 @@ ENTRY(tl_ipi_spitfire_dcache_page_inval)
 2:	brgz,pt	%g2, 1b
 	 sub	%g2, %g4, %g2
 
-	IPI_DONE(%g5, %g1, %g2, %g3)
+	IPI_DONE(%g5, %g1, %g2, %g3, %g4)
 	retry
 END(tl_ipi_spitfire_dcache_page_inval)
 
@@ -117,7 +127,7 @@ ENTRY(tl_ipi_spitfire_icache_page_inval)
 2:	brgz,pt	%g2, 1b
 	 sub	%g2, %g4, %g2
 
-	IPI_DONE(%g5, %g1, %g2, %g3)
+	IPI_DONE(%g5, %g1, %g2, %g3, %g4)
 	retry
 END(tl_ipi_spitfire_icache_page_inval)
 
@@ -148,7 +158,7 @@ ENTRY(tl_ipi_cheetah_dcache_page_inval)
 	blt,a,pt %xcc, 1b
 	 nop
 
-	IPI_DONE(%g5, %g1, %g2, %g3)
+	IPI_DONE(%g5, %g1, %g2, %g3, %g4)
 	retry
 END(tl_ipi_cheetah_dcache_page_inval)
 
@@ -204,7 +214,7 @@ ENTRY(tl_ipi_tlb_page_demap)
 	stxa	%g0, [%g2] ASI_IMMU_DEMAP
 	flush	%g3
 
-	IPI_DONE(%g5, %g1, %g2, %g3)
+	IPI_DONE(%g5, %g1, %g2, %g3, %g4)
 	retry
 END(tl_ipi_tlb_page_demap)
 
@@ -247,7 +257,7 @@ ENTRY(tl_ipi_tlb_range_demap)
 	blt,a,pt %xcc, 1b
 	 nop
 
-	IPI_DONE(%g5, %g1, %g2, %g3)
+	IPI_DONE(%g5, %g1, %g2, %g3, %g4)
 	retry
 END(tl_ipi_tlb_range_demap)
 
@@ -271,7 +281,7 @@ ENTRY(tl_ipi_tlb_context_demap)
 	stxa	%g0, [%g1] ASI_IMMU_DEMAP
 	flush	%g3
 
-	IPI_DONE(%g5, %g1, %g2, %g3)
+	IPI_DONE(%g5, %g1, %g2, %g3, %g4)
 	retry
 END(tl_ipi_tlb_context_demap)
 
@@ -283,7 +293,7 @@ ENTRY(tl_ipi_stick_rd)
 	rd	%asr24, %g2
 	stx	%g2, [%g1]
 
-	IPI_DONE(%g5, %g1, %g2, %g3)
+	IPI_DONE(%g5, %g1, %g2, %g3, %g4)
 	retry
 END(tl_ipi_stick_rd)
 
@@ -295,6 +305,6 @@ ENTRY(tl_ipi_tick_rd)
 	rd	%tick, %g2
 	stx	%g2, [%g1]
 
-	IPI_DONE(%g5, %g1, %g2, %g3)
+	IPI_DONE(%g5, %g1, %g2, %g3, %g4)
 	retry
 END(tl_ipi_tick_rd)