cosmetic changes and style fixes

3 files changed, 31 insertions, 24 deletions

diff --git a/sys/sparc64/pci/ofw_pci.h b/sys/sparc64/pci/ofw_pci.h
index 352b8b8..252f474 100644
--- a/sys/sparc64/pci/ofw_pci.h
+++ b/sys/sparc64/pci/ofw_pci.h
@@ -32,7 +32,7 @@
  */
 
 #ifndef _SPARC64_PCI_OFW_PCI_H_
-#define _SPARC64_PCI_OFW_PCI_H_
+#define	_SPARC64_PCI_OFW_PCI_H_
 
 #include <machine/ofw_bus.h>
 
@@ -40,7 +40,7 @@ typedef uint32_t ofw_pci_intr_t;
 
 /* PCI range child spaces. XXX: are these MI? */
 #define	OFW_PCI_CS_CONFIG	0x00
-#define	OFW_PCI_CS_IO	0x01
+#define	OFW_PCI_CS_IO		0x01
 #define	OFW_PCI_CS_MEM32	0x02
 #define	OFW_PCI_CS_MEM64	0x03
 
@@ -62,4 +62,7 @@ struct ofw_pci_ranges {
 	(((uint64_t)(r)->size_hi << 32) | (uint64_t)(r)->size_lo)
 #define	OFW_PCI_RANGE_CS(r)	(((r)->cspace >> 24) & 0x03)
 
+/* default values */
+#define	OFW_PCI_LATENCY	64
+
 #endif /* ! _SPARC64_PCI_OFW_PCI_H_ */
diff --git a/sys/sparc64/pci/ofw_pcibus.c b/sys/sparc64/pci/ofw_pcibus.c
index 3732ac3..b264006 100644
--- a/sys/sparc64/pci/ofw_pcibus.c
+++ b/sys/sparc64/pci/ofw_pcibus.c
@@ -60,10 +60,10 @@ __FBSDID("$FreeBSD$");
 #include "pcib_if.h"
 #include "pci_if.h"
 
-/* Helper functions. */
+/* Helper functions */
 static void ofw_pcibus_setup_device(device_t, u_int, u_int, u_int);
 
-/* Methods. */
+/* Methods */
 static device_probe_t ofw_pcibus_probe;
 static device_attach_t ofw_pcibus_attach;
 static pci_assign_interrupt_t ofw_pcibus_assign_interrupt;
@@ -123,12 +123,12 @@ ofw_pcibus_setup_device(device_t bridge, u_int busno, u_int slot, u_int func)
 	uint32_t reg;
 
 	/*
-	 * Initialize the latency timer register for busmaster devices to work
-	 * properly. This is another task which the firmware does not always
-	 * perform. The Min_Gnt register can be used to compute it's recommended
-	 * value: it contains the desired latency in units of 1/4 us. To
-	 * calculate the correct latency timer value, the clock frequency of
-	 * the bus (defaulting to 33Mhz) should be used and no wait states
+	 * Initialize the latency timer register for busmaster devices to
+	 * work properly.  This is another task which the firmware doesn't
+	 * always perform.  The Min_Gnt register can be used to compute its
+	 * recommended value: it contains the desired latency in units of
+	 * 1/4 us.  To calculate the correct latency timer value, the clock
+	 * frequency of the bus (defaulting to 33MHz) and no wait states
 	 * should be assumed.
 	 */
 	if (OF_getprop(ofw_bus_get_node(bridge), "clock-frequency", &reg,
@@ -151,17 +151,18 @@ ofw_pcibus_setup_device(device_t bridge, u_int busno, u_int slot, u_int func)
 	/*
 	 * Compute a value to write into the cache line size register.
 	 * The role of the streaming cache is unclear in write invalidate
-	 * transfers, so it is made sure that it's line size is always reached.
-	 * Generally, the cache line size is fixed at 64 bytes by Fireplane/
-	 * Safari, JBus and UPA.
+	 * transfers, so it is made sure that it's line size is always
+	 * reached.  Generally, the cache line size is fixed at 64 bytes
+	 * by Fireplane/Safari, JBus and UPA.
 	 */
 	PCIB_WRITE_CONFIG(bridge, busno, slot, func, PCIR_CACHELNSZ,
 	    STRBUF_LINESZ / sizeof(uint32_t), 1);
 #endif
 
 	/*
-	 * The preset in the intline register is usually wrong. Reset it to 255,
-	 * so that the PCI code will reroute the interrupt if needed.
+	 * The preset in the intline register is usually wrong.  Reset
+	 * it to 255, so that the PCI code will reroute the interrupt if
+	 * needed.
 	 */
 	PCIB_WRITE_CONFIG(bridge, busno, slot, func, PCIR_INTLINE,
 	    PCI_INVALID_IRQ, 1);
@@ -183,7 +184,6 @@ ofw_pcibus_attach(device_t dev)
 	if (bootverbose)
 		device_printf(dev, "domain=%d, physical bus=%d\n",
 		    domain, busno);
-
 	node = ofw_bus_get_node(dev);
 
 #ifndef SUN4V
@@ -237,7 +237,8 @@ ofw_pcibus_assign_interrupt(device_t dev, device_t child)
 	} else if (intr >= 255) {
 		/*
 		 * A fully specified interrupt (including IGN), as present on
-		 * SPARCengine Ultra AX and e450. Extract the INO and return it.
+		 * SPARCengine Ultra AX and E450.  Extract the INO and return
+		 * it.
 		 */
 		return (INTINO(intr));
 #endif
@@ -245,11 +246,12 @@ ofw_pcibus_assign_interrupt(device_t dev, device_t child)
 	/*
 	 * If we got intr from a property, it may or may not be an intpin.
 	 * For on-board devices, it frequently is not, and is completely out
-	 * of the valid intpin range. For PCI slots, it hopefully is, otherwise
-	 * we will have trouble interfacing with non-OFW buses such as cardbus.
+	 * of the valid intpin range.  For PCI slots, it hopefully is,
+	 * otherwise we will have trouble interfacing with non-OFW buses
+	 * such as cardbus.
 	 * Since we cannot tell which it is without violating layering, we
-	 * will always use the route_interrupt method, and treat exceptions on
-	 * the level they become apparent.
+	 * will always use the route_interrupt method, and treat exceptions
+	 * on the level they become apparent.
 	 */
 	return (PCIB_ROUTE_INTERRUPT(device_get_parent(dev), child, intr));
 }
diff --git a/sys/sparc64/pci/psycho.c b/sys/sparc64/pci/psycho.c
index 034e794..88d7bc8 100644
--- a/sys/sparc64/pci/psycho.c
+++ b/sys/sparc64/pci/psycho.c
@@ -281,7 +281,6 @@ psycho_probe(device_t dev)
 		device_set_desc(dev, "U2P UPA-PCI bridge");
 		return (0);
 	}
-
 	return (ENXIO);
 }
 
@@ -331,6 +330,7 @@ psycho_attach(device_t dev)
 		default:
 			panic("%s: bogus PCI control register location",
 			    __func__);
+			/* NOTREACHED */
 		}
 	} else {
 		rid = 0;
@@ -651,7 +651,7 @@ psycho_attach(device_t dev)
 	 * firmware.
 	 */
 	PCIB_WRITE_CONFIG(dev, sc->sc_pci_secbus, PCS_DEVICE, PCS_FUNC,
-	    PCIR_LATTIMER, 64, 1);
+	    PCIR_LATTIMER, OFW_PCI_LATENCY, 1);
 
 	for (n = PCIR_VENDOR; n < PCIR_STATUS; n += sizeof(uint16_t))
 		le16enc(&sc->sc_pci_hpbcfg[n], bus_space_read_2(
@@ -966,6 +966,7 @@ psycho_read_config(device_t dev, u_int bus, u_int slot, u_int func, u_int reg,
 		break;
 	default:
 		panic("%s: bad width", __func__);
+		/* NOTREACHED */
 	}
 
 	if (i) {
@@ -1001,6 +1002,7 @@ psycho_write_config(device_t dev, u_int bus, u_int slot, u_int func, u_int reg,
 		break;
 	default:
 		panic("%s: bad width", __func__);
+		/* NOTREACHED */
 	}
 }
 
@@ -1278,6 +1280,7 @@ psycho_alloc_resource(device_t bus, device_t child, int type, int *rid,
 		break;
 	default:
 		return (NULL);
+		/* NOTREACHED */
 	}
 
 	rv = rman_reserve_resource(rm, start, end, count, flags, child);
@@ -1294,7 +1297,6 @@ psycho_alloc_resource(device_t bus, device_t child, int type, int *rid,
 			return (NULL);
 		}
 	}
-
 	return (rv);
 }