o Revamp the sparc64 interrupt code in order to be able to interface

  with the INTR_FILTER-enabled MI code. Basically this consists of
  registering an interrupt controller (of which there can be multiple
  and optionally different ones either per host-to-foo bridge or shared
  amongst host-to-foo bridges in any one machine) along with an interrupt
  vector as specific argument for all the interrupt vectors used by a
  given host-to-foo bridge (roughly similar to registering interrupt
  sources on amd64 and i386), providing functions to enable, clear and
  disable the interrupts of the children beneath the bridge.
  This also includes:
  - No longer entering a critical section in tl0_intr() and tl1_intr()
    for executing interrupt handlers but rather let the handlers enter
    it themselves so in the case of intr_event_handle() we don't enter
    a nested critical section.
  - Adding infrastructure for binding delivery of interrupt vectors to
    specific CPUs which later on can be interfaced with the code from
    amd64/i386 for binding interrupts to specific CPUs.
  - Getting rid of the wrapper hack introduced along the lines of the
    API changes for INTR_FILTER which as a side-effect caused interrupts
    associated with ithread handlers only to get the elevated priority
    of those associated with filters ("fast handlers") (this removes the
    hack also in the non-INTR_FILTER case).
  - Disabling (by not clearing) an interrupt in the interrupt controller
    until all associated handlers have been executed, which is crucial
    for the typical locking strategy of NIC drivers in order to work
    correctly in case of shared interrupts. This was a more or less
    theoretical problem on sparc64 though, as shared interrupts are
    rather uncommon there except for the on-board SCCs and UARTs.
  Note that due to the behavior of at least of some of the interrupt
  controllers used on sparc64 an enable+EOI instead of a disable+EOI
  approach (as implied by the INTR_FILTER MI code and implemented on
  other architectures) is used as the latter can cause lost interrupts
  or in the worst case interrupt starvation.
o Correct a typo in sbus_alloc_resource() which caused (pass-through)
  allocations to only work down to the grandchildren of the bus, which
  wasn't a real problem so far as we don't support any devices which are
  great-grandchildren or greater of a U2S bridge, yet.
o In fhc(4) use bus_{read,write}_4() instead of bus_space_{read,write}_4()
  in order to get rid of sc_bh and sc_bt in the fhc_softc. Also get rid
  of some other unneeded members in fhc_softc.

Reviewed by:	marcel (earlier version)
Approved by:	re (kensmith)

2 files changed, 18 insertions, 4 deletions

diff --git a/sys/sparc64/include/bus_common.h b/sys/sparc64/include/bus_common.h
index f0c491b..fce7584 100644
--- a/sys/sparc64/include/bus_common.h
+++ b/sys/sparc64/include/bus_common.h
@@ -51,12 +51,15 @@
 #define	INTMAP_PCISLOT_MASK	0x00000000cLL	/* PCI slot # */
 #define	INTMAP_PCIINT_MASK	0x000000003LL	/* PCI interrupt #A,#B,#C,#D */
 #define	INTMAP_OBIO_MASK	0x000000020LL	/* Onboard device */
+#define	INTIGN(x)		(((x) & INTMAP_IGN_MASK) >> INTMAP_IGN_SHIFT)
 #define	INTVEC(x)		((x) & INTMAP_INR_MASK)
 #define	INTSLOT(x)		(((x) >> 3) & 0x7)
 #define	INTPRI(x)		((x) & 0x7)
 #define	INTINO(x)		((x) & INTMAP_INO_MASK)
 #define	INTMAP_ENABLE(mr, mid) \
 	(((mr) & ~INTMAP_TID_MASK) | ((mid) << INTMAP_TID_SHIFT) | INTMAP_V)
+#define	INTMAP_VEC(ign, inr) \
+	(((ign) << INTMAP_IGN_SHIFT) | (inr))
 
 /* counter-timer support. */
 void sparc64_counter_init(bus_space_tag_t tag, bus_space_handle_t handle,
diff --git a/sys/sparc64/include/intr_machdep.h b/sys/sparc64/include/intr_machdep.h
index 339586f..1a9209f 100644
--- a/sys/sparc64/include/intr_machdep.h
+++ b/sys/sparc64/include/intr_machdep.h
@@ -39,7 +39,7 @@
 
 #define	IH_SHIFT	PTR_SHIFT
 #define	IQE_SHIFT	5
-#define	IV_SHIFT	5
+#define	IV_SHIFT	6
 
 #define	PIL_LOW		1	/* stray interrupts */
 #define	PIL_ITHREAD	2	/* interrupts that use ithreads */
@@ -56,8 +56,6 @@ struct trapframe;
 typedef	void ih_func_t(struct trapframe *);
 typedef	void iv_func_t(void *);
 
-struct ithd;
-
 struct intr_request {
 	struct	intr_request *ir_next;
 	iv_func_t *ir_func;
@@ -66,12 +64,23 @@ struct intr_request {
 	u_int	ir_pri;
 };
 
+struct intr_controller {
+	void	(*ic_enable)(void *);
+	void	(*ic_disable)(void *);
+	void	(*ic_eoi)(void *);
+};
+
 struct intr_vector {
 	iv_func_t *iv_func;
 	void	*iv_arg;
+	const struct	intr_controller *iv_ic;
+	void	*iv_icarg;
 	struct	intr_event *iv_event;
 	u_int	iv_pri;
 	u_int	iv_vec;
+	u_int	iv_mid;
+	u_int	iv_refcnt;
+	u_int	iv_pad[2];
 };
 
 extern ih_func_t *intr_handlers[];
@@ -81,8 +90,10 @@ void	intr_setup(int level, ih_func_t *ihf, int pri, iv_func_t *ivf,
 	    void *iva);
 void	intr_init1(void);
 void	intr_init2(void);
+int	intr_controller_register(int vec, const struct intr_controller *ic,
+	    void *icarg);
 int	inthand_add(const char *name, int vec, int (*filt)(void *),
-	     void (*handler)(void *), void *arg, int flags, void **cookiep);
+	    void (*handler)(void *), void *arg, int flags, void **cookiep);
 int	inthand_remove(int vec, void *cookie);
 
 ih_func_t intr_fast;