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authormarius <marius@FreeBSD.org>2008-09-02 21:13:54 +0000
committermarius <marius@FreeBSD.org>2008-09-02 21:13:54 +0000
commit6b0f6beaa5b6fb8f33de23b54d4f15ff2db26715 (patch)
tree425ae595667bc694e39979552e8df80548d7da12 /sys/sparc64/include
parent6a6f30db5a22aab1cca7b11f6053501d5c547681 (diff)
downloadFreeBSD-src-6b0f6beaa5b6fb8f33de23b54d4f15ff2db26715.zip
FreeBSD-src-6b0f6beaa5b6fb8f33de23b54d4f15ff2db26715.tar.gz
- USIII-based machines can consist of CPUs having different cache
sizes (and running at different frequencies) so move the cacheinfo to the PCPU data. While at it, remove some redundant and/or unused members from struct cacheinfo. - In sparc64_init don't assume the first CPU node we find in the OFW device tree is the BSP.
Diffstat (limited to 'sys/sparc64/include')
-rw-r--r--sys/sparc64/include/cache.h16
-rw-r--r--sys/sparc64/include/pcpu.h2
2 files changed, 5 insertions, 13 deletions
diff --git a/sys/sparc64/include/cache.h b/sys/sparc64/include/cache.h
index c2c2b23..9dd7191 100644
--- a/sys/sparc64/include/cache.h
+++ b/sys/sparc64/include/cache.h
@@ -45,10 +45,6 @@
#ifndef _MACHINE_CACHE_H_
#define _MACHINE_CACHE_H_
-#ifndef LOCORE
-#include <dev/ofw/openfirm.h>
-#endif
-
#define DCACHE_COLOR_BITS (1)
#define DCACHE_COLORS (1 << DCACHE_COLOR_BITS)
#define DCACHE_COLOR_MASK (DCACHE_COLORS - 1)
@@ -80,31 +76,27 @@
* Cache control information
*/
struct cacheinfo {
- u_int c_enabled; /* true => cache is enabled */
u_int ic_size; /* instruction cache */
- u_int ic_set;
- u_int ic_l2set;
u_int ic_assoc;
u_int ic_linesize;
u_int dc_size; /* data cache */
- u_int dc_l2size;
u_int dc_assoc;
u_int dc_linesize;
u_int ec_size; /* external cache info */
u_int ec_assoc;
- u_int ec_l2set;
u_int ec_linesize;
- u_int ec_l2linesize;
};
#ifdef _KERNEL
+struct pcpu;
+
typedef void cache_enable_t(void);
typedef void cache_flush_t(void);
typedef void dcache_page_inval_t(vm_paddr_t pa);
typedef void icache_page_inval_t(vm_paddr_t pa);
-void cache_init(phandle_t node);
+void cache_init(struct pcpu *pcpu);
cache_enable_t cheetah_cache_enable;
cache_flush_t cheetah_cache_flush;
@@ -121,8 +113,6 @@ extern cache_flush_t *cache_flush;
extern dcache_page_inval_t *dcache_page_inval;
extern icache_page_inval_t *icache_page_inval;
-extern struct cacheinfo cache;
-
#endif /* KERNEL */
#endif /* !LOCORE */
diff --git a/sys/sparc64/include/pcpu.h b/sys/sparc64/include/pcpu.h
index 91c1e5d..2ccdbd9 100644
--- a/sys/sparc64/include/pcpu.h
+++ b/sys/sparc64/include/pcpu.h
@@ -31,6 +31,7 @@
#define _MACHINE_PCPU_H_
#include <machine/asmacros.h>
+#include <machine/cache.h>
#include <machine/frame.h>
#include <machine/intr_machdep.h>
@@ -43,6 +44,7 @@ struct pmap;
* point at the globaldata structure.
*/
#define PCPU_MD_FIELDS \
+ struct cacheinfo pc_cache; \
struct intr_request pc_irpool[IR_FREE]; \
struct intr_request *pc_irhead; \
struct intr_request **pc_irtail; \
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