- Change the way the direct mapped region is implemented to be generally

  useful for accessing more than 1 page of contiguous physical memory, and
  to use 4mb tlb entries instead of 8k.  This requires that the system only
  use the direct mapped addresses when they have the same virtual colour as
  all other mappings of the same page, instead of being able to choose the
  colour and cachability of the mapping.
- Adapt the physical page copying and zeroing functions to account for not
  being able to choose the colour or cachability of the direct mapped
  address.  This adds a lot more cases to handle.  Basically when a page has
  a different colour than its direct mapped address we have a choice between
  bypassing the data cache and using physical addresses directly, which
  requires a cache flush, or mapping it at the right colour, which requires
  a tlb flush.  For now we choose to map the page and do the tlb flush.

This will allows the direct mapped addresses to be used for more things
that don't require normal pmap handling, including mapping the vm_page
structures, the message buffer, temporary mappings for crash dumps, and will
provide greater benefit for implementing uma_small_alloc, due to the much
greater tlb coverage.

1 files changed, 72 insertions, 31 deletions

diff --git a/sys/sparc64/include/vmparam.h b/sys/sparc64/include/vmparam.h
index 7b916bc..910a8a6 100644
--- a/sys/sparc64/include/vmparam.h
+++ b/sys/sparc64/include/vmparam.h
@@ -78,26 +78,81 @@
 #define	MAXSLP			20
 
 /*
- * Highest user address.  Also address of initial user stack.  This is
- * arbitrary, neither the structure or size of the user page table (tsb)
- * nor the location or size of the kernel virtual address space have any
- * bearing on what we use for user addresses.  We want something relatively
- * high to give a large address space, but we also have to take the out of
- * range va hole into account.  So we pick an address just before the start
- * of the hole, which gives a user address space of just under 8TB.  Note
- * that if this moves above the va hole, we will have to deal with sign
- * extension of virtual addresses.
+ * Address space layout.
+ *
+ * UltraSPARC I and II implement a 44 bit virtual address space.  The address
+ * space is split into 2 regions at each end of the 64 bit address space, with
+ * an out of range "hole" in the middle.  UltraSPARC III implements the full
+ * 64 bit virtual address space, but we don't really have any use for it and
+ * 43 bits of user address space is considered to be "enough", so we ignore it.
+ *
+ * Upper region:	0xffffffffffffffff
+ * 			0xfffff80000000000
+ * 
+ * Hole:		0xfffff7ffffffffff
+ * 			0x0000080000000000
+ *
+ * Lower region:	0x000007ffffffffff
+ * 			0x0000000000000000
+ *
+ * In general we ignore the upper region, and use the lower region as mappable
+ * space.
+ *
+ * We define some interesting address constants:
+ *
+ * VM_MIN_ADDRESS and VM_MAX_ADDRESS define the start and of the entire 64 bit
+ * address space, mostly just for convenience.
+ *
+ * VM_MIN_DIRECT_ADDRESS and VM_MAX_DIRECT_ADDRESS define the start and end
+ * of the direct mapped region.  This maps virtual addresses to physical
+ * addresses directly using 4mb tlb entries, with the physical address encoded
+ * in the lower 43 bits of virtual address.  These mappings are convenient
+ * because they do not require page tables, and because they never change they
+ * do not require tlb flushes.  However, since these mappings are cacheable,
+ * we must ensure that all pages accessed this way are either not double
+ * mapped, or that all other mappings have virtual color equal to physical
+ * color, in order to avoid creating illegal aliases in the data cache.
+ *
+ * VM_MIN_KERNEL_ADDRESS and VM_MAX_KERNEL_ADDRESS define the start and end of
+ * mappable kernel virtual address space.  VM_MIN_KERNEL_ADDRESS is basically
+ * arbitrary, a convenient address is chosen which allows both the kernel text
+ * and data and the prom's address space to be mapped with 1 4mb tsb page.
+ * VM_MAX_KERNEL_ADDRESS is variable, computed at startup time based on the
+ * amount of physical memory available.  Each 4mb tsb page provides 1g of
+ * virtual address space, with the only practical limit being available
+ * phsyical memory.
+ *
+ * VM_MIN_PROM_ADDRESS and VM_MAX_PROM_ADDRESS define the start and end of the
+ * prom address space.  On startup the prom's mappings are duplicated in the
+ * kernel tsb, to allow prom memory to be accessed normally by the kernel.
+ *
+ * VM_MIN_USER_ADDRESS and VM_MAX_USER_ADDRESS define the start and end of the
+ * user address space.  There are some hardware errata about using addresses
+ * at the boundary of the va hole, so we allow just under 43 bits of user
+ * address space.  Note that the kernel and user address spaces overlap, but
+ * this doesn't matter because they use different tlb contexts, and because
+ * the kernel address space is not mapped into each process' address space.
  */
-#define	VM_MAXUSER_ADDRESS	(0x7fe00000000UL)
+#define	VM_MIN_ADDRESS		(0x0000000000000000UL)
+#define	VM_MAX_ADDRESS		(0xffffffffffffffffUL)
 
-#define	VM_MIN_ADDRESS		(0UL)
-#define	VM_MAX_ADDRESS		(VM_MAXUSER_ADDRESS)
+#define	VM_MIN_DIRECT_ADDRESS	(0xfffff80000000000UL)
+#define	VM_MAX_DIRECT_ADDRESS	(VM_MAX_ADDRESS)
 
-/*
- * Initial user stack address for 64 bit processes.  Should be highest user
- * virtual address.
- */
-#define	USRSTACK		VM_MAXUSER_ADDRESS
+#define	VM_MIN_KERNEL_ADDRESS	(0x00000000c0000000UL)
+#define	VM_MAX_KERNEL_ADDRESS	(vm_max_kernel_address)
+
+#define	VM_MIN_PROM_ADDRESS	(0x00000000f0000000UL)
+#define	VM_MAX_PROM_ADDRESS	(0x00000000ffffe000UL)
+
+#define	VM_MIN_USER_ADDRESS	(0x0000000000000000UL)
+#define	VM_MAX_USER_ADDRESS	(0x000007fe00000000UL)
+
+#define	VM_MINUSER_ADDRESS	(VM_MIN_USER_ADDRESS)
+#define	VM_MAXUSER_ADDRESS	(VM_MAX_USER_ADDRESS)
+
+#define	KERNBASE		(VM_MIN_KERNEL_ADDRESS)
+#define	USRSTACK		(VM_MAX_USER_ADDRESS)
 
 /*
  * Virtual size (bytes) for various kernel submaps.
@@ -116,20 +171,6 @@
 #endif
 
 /*
- * Lowest kernel virtual address, where the kernel is loaded.  This is also
- * arbitrary.  We pick a resonably low address, which allows all of kernel
- * text, data and bss to be below the 4 gigabyte mark, yet still high enough
- * to cover the prom addresses with 1 tsb page.  This also happens to be the
- * same as for x86 with default KVA_PAGES...
- */
-#define	VM_MIN_KERNEL_ADDRESS	(0xc0000000)
-#define	VM_MIN_PROM_ADDRESS	(0xf0000000)
-#define	VM_MAX_PROM_ADDRESS	(0xffffe000)
-
-#define	KERNBASE		(VM_MIN_KERNEL_ADDRESS)
-#define	VM_MAX_KERNEL_ADDRESS	(vm_max_kernel_address)
-
-/*
  * Initial pagein size of beginning of executable file.
  */
 #ifndef	VM_INITIAL_PAGEIN