Use the vis block copy/zero functions for pmap_copy_page and pmap_zero_page.

These are called through function pointers so that different implementations
can be provided for cheetah, where the block load instructions may or may
not be a win, and so they can be disabled with the machdep.use_vis tunable.
In terms of raw bandwidth the integer versions are faster, but not allocating
lines in the L2 cache for useless data gives a measurable improvement in user
time for the benchmarks I tested (mostly buildworld with -j8).

As far as I can tell the instructions used are implemented on everything
back to UltraSPARC I, so there should not be a problem with different cpu
types.

1 files changed, 9 insertions, 4 deletions

diff --git a/sys/sparc64/include/md_var.h b/sys/sparc64/include/md_var.h
index ac142ed..e8bd2d9 100644
--- a/sys/sparc64/include/md_var.h
+++ b/sys/sparc64/include/md_var.h
@@ -33,6 +33,9 @@
 #ifndef	_MACHINE_MD_VAR_H_
 #define	_MACHINE_MD_VAR_H_
 
+typedef void cpu_block_copy_t(const void *src, void *dst, size_t len);
+typedef void cpu_block_zero_t(void *dst, size_t len);
+
 extern	char	tl0_base[];
 extern	char	_end[];
 
@@ -41,10 +44,6 @@ extern	long	Maxmem;
 extern	vm_offset_t kstack0;
 extern	vm_offset_t kstack0_phys;
 
-struct	dbreg;
-struct	fpreg;
-struct	thread;
-struct	reg;
 struct	pcpu;
 
 void	cpu_halt(void);
@@ -54,4 +53,10 @@ void	cpu_setregs(struct pcpu *pc);
 int	is_physical_memory(vm_offset_t addr);
 void	swi_vm(void *v);
 
+cpu_block_copy_t spitfire_block_copy;
+cpu_block_zero_t spitfire_block_zero;
+
+extern	cpu_block_copy_t *cpu_block_copy;
+extern	cpu_block_zero_t *cpu_block_zero;
+
 #endif /* !_MACHINE_MD_VAR_H_ */