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authorjake <jake@FreeBSD.org>2002-01-08 05:50:26 +0000
committerjake <jake@FreeBSD.org>2002-01-08 05:50:26 +0000
commitc6fae0305804265dc3c2d070c24f80feec508c49 (patch)
tree52abe667b30cf78a7b6324450d69a3d08fde34ba /sys/sparc64/include/intr_machdep.h
parent68d3ae71f670012666fcc01a9e2162487e5e1134 (diff)
downloadFreeBSD-src-c6fae0305804265dc3c2d070c24f80feec508c49.zip
FreeBSD-src-c6fae0305804265dc3c2d070c24f80feec508c49.tar.gz
Add initial smp support. This gets as far as allowing the secondary
cpu(s) into the kernel, and sync-ing them up to "kernel" mode so we can send them ipis, which also work. Thanks to John Baldwin for providing me with access to the hardware that made this possible. Parts obtained from: bsd/os
Diffstat (limited to 'sys/sparc64/include/intr_machdep.h')
-rw-r--r--sys/sparc64/include/intr_machdep.h3
1 files changed, 3 insertions, 0 deletions
diff --git a/sys/sparc64/include/intr_machdep.h b/sys/sparc64/include/intr_machdep.h
index c4991de..165f644 100644
--- a/sys/sparc64/include/intr_machdep.h
+++ b/sys/sparc64/include/intr_machdep.h
@@ -41,6 +41,9 @@
#define PIL_LOW 1 /* stray interrupts */
#define PIL_ITHREAD 2 /* interrupts that use ithreads */
+#define PIL_RENDEZVOUS 3 /* smp rendezvous ipi */
+#define PIL_AST 4 /* ast ipi */
+#define PIL_STOP 5 /* stop cpu ipi */
#define PIL_FAST 13 /* fast interrupts */
#define PIL_TICK 14
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