Add two new workaround for firmware anomalies:

1. At least some Netra t1 models have PCI buses with no associated
   interrupt map, but obviously expect the PCI swizzle to be done with
   the interrupt number from the higher level as intpin. In this case,
   the mapping also needs to continue at parent bus nodes.
   To handle that, add a quirk table based on the "name" property of
   the root node to avoid breaking other boxen. This property is now
   retrieved and printed at boot.
2. On SPARCengine Ultra AX machines, interrupt numbers are not mapped
   at all, and full interrupt numbers (not just INOs) are given in
   the interrupt properties. This is more or less cosmetical; the
   PCI interrupt numbers would be wrong, but the psycho resource
   allocation method would pass the right numbers on anyway.

Tested by:	mux (1), Maxim Mazurok <maxim@km.ua> (2)

1 files changed, 1 insertions, 1 deletions

diff --git a/sys/sparc64/ebus/ebus.c b/sys/sparc64/ebus/ebus.c
index 69a12da..42d78c8 100644
--- a/sys/sparc64/ebus/ebus.c
+++ b/sys/sparc64/ebus/ebus.c
@@ -398,7 +398,7 @@ ebus_setup_dinfo(struct ebus_softc *sc, phandle_t node, char *name)
 	nintr = OF_getprop_alloc(node, "interrupts",  sizeof(*intrs),
 	    (void **)&intrs);
 	for (i = 0; i < nintr; i++) {
-		intr = ofw_bus_route_intr(node, intrs[i]);
+		intr = ofw_bus_route_intr(node, intrs[i], ofw_pci_orb_callback);
 		if (intr == ORIR_NOTFOUND) {
 			panic("ebus_setup_dinfo: could not map ebus "
 			    "interrupt %d", intrs[i]);