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authormarcel <marcel@FreeBSD.org>2010-06-23 23:16:27 +0000
committermarcel <marcel@FreeBSD.org>2010-06-23 23:16:27 +0000
commitaa2ac84e2126d83c26647633ca465fec584c709e (patch)
tree779474341b798af1c167a133996532873bf23b68 /sys/powerpc
parentd7c1d40d534867476888e6e606958e8fbd40c9ed (diff)
downloadFreeBSD-src-aa2ac84e2126d83c26647633ca465fec584c709e.zip
FreeBSD-src-aa2ac84e2126d83c26647633ca465fec584c709e.tar.gz
With openpic(4) using active-low as the default polarity, reconfigure
the internal interrupt sources as active-high. The internal interrupt sources are disabled when programmed as active-low. Note that the internal interrupts have no sense bit like the external interrupts. We program them as edge-triggered to make sure we write a 0 value to a reserved register. It does not in any way say anything about the sense of internal interrupt.
Diffstat (limited to 'sys/powerpc')
-rw-r--r--sys/powerpc/mpc85xx/ocpbus.c11
1 files changed, 9 insertions, 2 deletions
diff --git a/sys/powerpc/mpc85xx/ocpbus.c b/sys/powerpc/mpc85xx/ocpbus.c
index 17f9d9d..483c620 100644
--- a/sys/powerpc/mpc85xx/ocpbus.c
+++ b/sys/powerpc/mpc85xx/ocpbus.c
@@ -277,8 +277,15 @@ ocpbus_attach(device_t dev)
ccsr_read4(OCP85XX_PORDEVSR),
ccsr_read4(OCP85XX_PORDEVSR2));
- for (i = INTR_VEC(OPIC_ID, 0); i < INTR_VEC(OPIC_ID, 4); i++)
- powerpc_config_intr(i, INTR_TRIGGER_LEVEL, INTR_POLARITY_LOW);
+ /*
+ * Internal interrupt are always active-high. Since the sense cannot
+ * be specified, we program as edge-triggered to make sure we write
+ * a 0 value to the reserved bit in the OpenPIC compliant PIC. This
+ * is not to say anything about the sense of any of the internal
+ * interrupt sources.
+ */
+ for (i = PIC_IRQ_INT(0); i < PIC_IRQ_INT(32); i++)
+ powerpc_config_intr(i, INTR_TRIGGER_EDGE, INTR_POLARITY_HIGH);
return (bus_generic_attach(dev));
}
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