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| author | gavin <gavin@FreeBSD.org> | 2012-09-18 22:04:59 +0000 |
|---|---|---|
| committer | gavin <gavin@FreeBSD.org> | 2012-09-18 22:04:59 +0000 |
| commit | 5005c75c5d4c3cea0b6150e4a8c7a1d2f928c052 (patch) | |
| tree | 7ed0c63fa2cebe3a1c0f0d218ef7d4208fbecfc4 /sys/powerpc/mpc85xx | |
| parent | 2f179bd308efd2cd4801f4373a8ac9fb8d37d848 (diff) | |
| download | FreeBSD-src-5005c75c5d4c3cea0b6150e4a8c7a1d2f928c052.zip FreeBSD-src-5005c75c5d4c3cea0b6150e4a8c7a1d2f928c052.tar.gz | |
Align the PCI Express #defines with the style used for the PCI-X
#defines. This also has the advantage that it makes the names more
compact, iand also allows us to correct the non-uniform naming of
the PCIM_LINK_* defines, making them all consistent amongst themselves.
This is a mostly mechanical rename:
s/PCIR_EXPRESS_/PCIER_/g
s/PCIM_EXP_/PCIEM_/g
s/PCIM_LINK_/PCIEM_LINK_/g
When this is MFC'd, #defines will be added for the old names to assist
out-of-tree drivers.
Discussed with: jhb
MFC after: 1 week
Diffstat (limited to 'sys/powerpc/mpc85xx')
| -rw-r--r-- | sys/powerpc/mpc85xx/pci_fdt.c | 12 |
1 files changed, 6 insertions, 6 deletions
diff --git a/sys/powerpc/mpc85xx/pci_fdt.c b/sys/powerpc/mpc85xx/pci_fdt.c index c431d66..724384d 100644 --- a/sys/powerpc/mpc85xx/pci_fdt.c +++ b/sys/powerpc/mpc85xx/pci_fdt.c @@ -848,10 +848,10 @@ fsl_pcib_err_init(device_t dev) 0xffffffff); dsr = fsl_pcib_cfgread(sc, 0, 0, 0, - sc->sc_pcie_capreg + PCIR_EXPRESS_DEVICE_STA, 2); + sc->sc_pcie_capreg + PCIER_DEVICE_STA, 2); if (dsr) fsl_pcib_cfgwrite(sc, 0, 0, 0, - sc->sc_pcie_capreg + PCIR_EXPRESS_DEVICE_STA, + sc->sc_pcie_capreg + PCIER_DEVICE_STA, 0xffff, 2); /* Enable all errors reporting */ @@ -861,11 +861,11 @@ fsl_pcib_err_init(device_t dev) /* Enable error reporting: URR, FER, NFER */ dcr = fsl_pcib_cfgread(sc, 0, 0, 0, - sc->sc_pcie_capreg + PCIR_EXPRESS_DEVICE_CTL, 4); - dcr |= PCIM_EXP_CTL_URR_ENABLE | PCIM_EXP_CTL_FER_ENABLE | - PCIM_EXP_CTL_NFER_ENABLE; + sc->sc_pcie_capreg + PCIER_DEVICE_CTL, 4); + dcr |= PCIEM_CTL_URR_ENABLE | PCIEM_CTL_FER_ENABLE | + PCIEM_CTL_NFER_ENABLE; fsl_pcib_cfgwrite(sc, 0, 0, 0, - sc->sc_pcie_capreg + PCIR_EXPRESS_DEVICE_CTL, dcr, 4); + sc->sc_pcie_capreg + PCIER_DEVICE_CTL, dcr, 4); } } |
