diff options
author | raj <raj@FreeBSD.org> | 2010-07-11 21:08:29 +0000 |
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committer | raj <raj@FreeBSD.org> | 2010-07-11 21:08:29 +0000 |
commit | 6496d826ccfca6b78860dfa86efcb3f96cb6053f (patch) | |
tree | 827f9dce3768613a609f3a9e594b123936ec2e0e /sys/powerpc/mpc85xx/mpc85xx.c | |
parent | 710dc13ac9dfbfa4fead6e52f9efb9e7b6af119e (diff) | |
download | FreeBSD-src-6496d826ccfca6b78860dfa86efcb3f96cb6053f.zip FreeBSD-src-6496d826ccfca6b78860dfa86efcb3f96cb6053f.tar.gz |
Convert Freescale PowerPC platforms to FDT convention.
The following systems are affected:
- MPC8555CDS
- MPC8572DS
This overhaul covers the following major changes:
- All integrated peripherals drivers for Freescale MPC85XX SoC, which are
currently in the FreeBSD source tree are reworked and adjusted so they
derive config data out of the device tree blob (instead of hard coded /
tabelarized values).
- This includes: LBC, PCI / PCI-Express, I2C, DS1553, OpenPIC, TSEC, SEC,
QUICC, UART, CFI.
- Thanks to the common FDT infrastrucutre (fdtbus, simplebus) we retire
ocpbus(4) driver, which was based on hard-coded config data.
Note that world for these platforms has to be built WITH_FDT.
Reviewed by: imp
Sponsored by: The FreeBSD Foundation
Diffstat (limited to 'sys/powerpc/mpc85xx/mpc85xx.c')
-rw-r--r-- | sys/powerpc/mpc85xx/mpc85xx.c | 37 |
1 files changed, 36 insertions, 1 deletions
diff --git a/sys/powerpc/mpc85xx/mpc85xx.c b/sys/powerpc/mpc85xx/mpc85xx.c index b6de50d..7530449 100644 --- a/sys/powerpc/mpc85xx/mpc85xx.c +++ b/sys/powerpc/mpc85xx/mpc85xx.c @@ -29,6 +29,9 @@ __FBSDID("$FreeBSD$"); #include <sys/param.h> #include <sys/systm.h> +#include <sys/lock.h> +#include <sys/mutex.h> +#include <sys/rman.h> #include <vm/vm.h> #include <vm/vm_param.h> @@ -37,7 +40,6 @@ __FBSDID("$FreeBSD$"); #include <machine/cpufunc.h> #include <machine/spr.h> -#include <powerpc/mpc85xx/ocpbus.h> #include <powerpc/mpc85xx/mpc85xx.h> /* @@ -129,6 +131,39 @@ law_disable(int trgt, u_long addr, u_long size) return (ENOENT); } +int +law_pci_target(struct resource *res, int *trgt_mem, int *trgt_io) +{ + u_long start; + uint32_t ver; + int trgt, rv; + + ver = SVR_VER(mfspr(SPR_SVR)); + + start = rman_get_start(res) & 0xf000; + + rv = 0; + trgt = -1; + switch (start) { + case 0x8000: + trgt = 0; + break; + case 0x9000: + trgt = 1; + break; + case 0xa000: + if (ver == SVR_MPC8572E || ver == SVR_MPC8572) + trgt = 2; + else + rv = EINVAL; + break; + default: + rv = ENXIO; + } + *trgt_mem = *trgt_io = trgt; + return (rv); +} + void cpu_reset(void) { |