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| author | grehan <grehan@FreeBSD.org> | 2004-02-09 00:12:50 +0000 |
|---|---|---|
| committer | grehan <grehan@FreeBSD.org> | 2004-02-09 00:12:50 +0000 |
| commit | 9d3fe37accd59810f30d8761c94396fb7213c719 (patch) | |
| tree | 8aefe61e8605ab179d9dd18a986a64162652244b /sys/powerpc/include | |
| parent | 364ec931161072812aa7ec5a5cdab0878dd97e12 (diff) | |
| download | FreeBSD-src-9d3fe37accd59810f30d8761c94396fb7213c719.zip FreeBSD-src-9d3fe37accd59810f30d8761c94396fb7213c719.tar.gz | |
Definitions for MPC7457 CPU type and HID0 bits
Diffstat (limited to 'sys/powerpc/include')
| -rw-r--r-- | sys/powerpc/include/hid.h | 75 | ||||
| -rw-r--r-- | sys/powerpc/include/spr.h | 2 |
2 files changed, 42 insertions, 35 deletions
diff --git a/sys/powerpc/include/hid.h b/sys/powerpc/include/hid.h index ef23fd9..d696b36 100644 --- a/sys/powerpc/include/hid.h +++ b/sys/powerpc/include/hid.h @@ -42,6 +42,7 @@ #define HID0_ECLK 0x02000000 /* CLK_OUT clock type selection */ #define HID0_PAR 0x01000000 /* Disable precharge of ARTRY */ #define HID0_STEN 0x01000000 /* Software table search enable (7450) */ +#define HID0_HBATEN 0x00800000 /* High BAT enable (7457) */ #define HID0_DOZE 0x00800000 /* Enable doze mode */ #define HID0_NAP 0x00400000 /* Enable nap mode */ #define HID0_SLEEP 0x00200000 /* Enable sleep mode */ @@ -58,6 +59,7 @@ #define HID0_ICFI 0x00000800 /* i-cache flush invalidate */ #define HID0_DCFI 0x00000400 /* d-cache flush invalidate */ #define HID0_SPD 0x00000200 /* Disable speculative cache access */ +#define HID0_XBSEN 0x00000100 /* Extended BAT block-size enable (7457) */ #define HID0_IFEM 0x00000100 /* Enable M-bit for I-fetch */ #define HID0_SGE 0x00000080 /* Enable store gathering */ #define HID0_DCFA 0x00000040 /* Data cache flush assist */ @@ -76,54 +78,57 @@ #define HID0_7450_BITMASK \ "\20" \ "\040EMCP\037b1\036b2\035b3\034b4\033TBEN\032b6\031STEN" \ - "\030b8\027NAP\026SLEEP\025DPM\024b12\023BHTCLR\022XAEN\021NHR" \ - "\020ICE\017DCE\016ILOCK\015DLOCK\014ICFI\013DCFI\012SPD\011b23" \ + "\030HBATEN\027NAP\026SLEEP\025DPM\024b12\023BHTCLR\022XAEN\021NHR" \ + "\020ICE\017DCE\016ILOCK\015DLOCK\014ICFI\013DCFI\012SPD\011XBSEN" \ "\010SGE\007b25\006BTIC\005LRSTK\004FOLD\003BHT\002NOPDST\001NOPTI" /* * HID0 bit definitions per cpu model * - * bit 603 604 750 7400 7410 7450 - * 0 EMCP EMCP EMCP EMCP EMCP - - * 1 - ECP DBP - - - - * 2 EBA EBA EBA EBA EDA - - * 3 EBD EBD EBD EBD EBD - - * 4 SBCLK - BCLK BCKL BCLK - - * 5 EICE - - - - TBEN - * 6 ECLK - ECLK ECLK ECLK - - * 7 PAR PAR PAR PAR PAR STEN - * 8 DOZE - DOZE DOZE DOZE - - * 9 NAP - NAP NAP NAP NAP - * 10 SLEEP - SLEEP SLEEP SLEEP SLEEP - * 11 DPM - DPM DPM DPM DPM - * 12 RISEG - - RISEG - - - * 13 - - - EIEC EIEC BHTCLR - * 14 - - - - - XAEN - * 15 - NHR NHR NHR NHR NHR - * 16 ICE ICE ICE ICE ICE ICE - * 17 DCE DCE DCE DCE DCE DCE - * 18 ILOCK ILOCK ILOCK ILOCK ILOCK ILOCK - * 19 DLOCK DLOCK DLOCK DLOCK DLOCK DLOCK - * 20 ICFI ICFI ICFI ICFI ICFI ICFI - * 21 DCFI DCFI DCFI DCFI DCFI DCFI - * 22 - - SPD SPD SPG SPD - * 23 - - IFEM IFTT IFTT - - * 24 - SIE SGE SGE SGE SGE - * 25 - - DCFA DCFA DCFA - - * 26 - - BTIC BTIC BTIC BTIC - * 27 FBIOB - - - - LRSTK - * 28 - - ABE - - FOLD - * 29 - BHT BHT BHT BHT BHT - * 30 - - - NOPDST NOPDST NOPDST - * 31 NOOPTI - NOOPTI NOPTI NOPTI NOPTI + * bit 603 604 750 7400 7410 7450 7457 + * 0 EMCP EMCP EMCP EMCP EMCP - - + * 1 - ECP DBP - - - - + * 2 EBA EBA EBA EBA EDA - - + * 3 EBD EBD EBD EBD EBD - - + * 4 SBCLK - BCLK BCKL BCLK - - + * 5 EICE - - - - TBEN TBEN + * 6 ECLK - ECLK ECLK ECLK - - + * 7 PAR PAR PAR PAR PAR STEN STEN + * 8 DOZE - DOZE DOZE DOZE - HBATEN + * 9 NAP - NAP NAP NAP NAP NAP + * 10 SLEEP - SLEEP SLEEP SLEEP SLEEP SLEEP + * 11 DPM - DPM DPM DPM DPM DPM + * 12 RISEG - - RISEG - - - + * 13 - - - EIEC EIEC BHTCLR BHTCLR + * 14 - - - - - XAEN XAEN + * 15 - NHR NHR NHR NHR NHR NHR + * 16 ICE ICE ICE ICE ICE ICE ICE + * 17 DCE DCE DCE DCE DCE DCE DCE + * 18 ILOCK ILOCK ILOCK ILOCK ILOCK ILOCK ILOCK + * 19 DLOCK DLOCK DLOCK DLOCK DLOCK DLOCK DLOCK + * 20 ICFI ICFI ICFI ICFI ICFI ICFI ICFI + * 21 DCFI DCFI DCFI DCFI DCFI DCFI DCFI + * 22 - - SPD SPD SPG SPD SPD + * 23 - - IFEM IFTT IFTT - XBSEN + * 24 - SIE SGE SGE SGE SGE SGE + * 25 - - DCFA DCFA DCFA - - + * 26 - - BTIC BTIC BTIC BTIC BTIC + * 27 FBIOB - - - - LRSTK LRSTK + * 28 - - ABE - - FOLD FOLD + * 29 - BHT BHT BHT BHT BHT BHT + * 30 - - - NOPDST NOPDST NOPDST NOPDST + * 31 NOOPTI - NOOPTI NOPTI NOPTI NOPTI NOPTI * * 604: ECP = Enable cache parity checking * 604: SIE = Serial instruction execution disable * 7450: TBEN = Time Base Enable * 7450: STEN = Software table lookup enable * 7450: BHTCLR = Branch history clear + * 7450: XAEN = Extended Addressing Enabled * 7450: LRSTK = Link Register Stack Enable * 7450: FOLD = Branch folding enable + * 7457: HBATEN = High BAT Enable + * 7457: XBSEN = Extended BAT Block Size Enable */ #endif /* _POWERPC_HID_H_ */ diff --git a/sys/powerpc/include/spr.h b/sys/powerpc/include/spr.h index 3eacd2f..1de0676 100644 --- a/sys/powerpc/include/spr.h +++ b/sys/powerpc/include/spr.h @@ -117,8 +117,10 @@ #define IBM405GP 0x4011 #define IBM405L 0x4161 #define IBM750FX 0x7000 +#define MPC745X_P(v) ((v & 0xFFFC) == 0x8000) #define MPC7450 0x8000 #define MPC7455 0x8001 +#define MPC7457 0x8002 #define MPC7410 0x800c #define MPC8245 0x8081 |
