MFC r257162, r257175

  The old trap.h (then trap_aim.h) actually had trap ID codes for Book-E CPUs.
  Use it universally. Book-E traps may also need revisiting due to the
  introduction of fixed-offset traps and the deprecation of IVORs in POWER
  ISA 2.06, but that's very much an issue for another day.

3 files changed, 125 insertions, 192 deletions

diff --git a/sys/powerpc/include/trap.h b/sys/powerpc/include/trap.h
index 75accf3..d8462cf 100644
--- a/sys/powerpc/include/trap.h
+++ b/sys/powerpc/include/trap.h
@@ -1,8 +1,128 @@
-/* $FreeBSD$ */
+/*-
+ * Copyright (C) 1995, 1996 Wolfgang Solfrank.
+ * Copyright (C) 1995, 1996 TooLs GmbH.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ * 3. All advertising materials mentioning features or use of this software
+ *    must display the following acknowledgement:
+ *	This product includes software developed by TooLs GmbH.
+ * 4. The name of TooLs GmbH may not be used to endorse or promote products
+ *    derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY TOOLS GMBH ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+ * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
+ * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+ * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
+ * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * $NetBSD: trap.h,v 1.7 2002/02/22 13:51:40 kleink Exp $
+ * $FreeBSD$
+ */
 
-#if defined(AIM)
-#include <machine/trap_aim.h>
-#elif defined(BOOKE)
-#include <machine/trap_booke.h>
+#ifndef	_POWERPC_TRAP_H_
+#define	_POWERPC_TRAP_H_
+
+#define	EXC_RSVD	0x0000		/* Reserved */
+#define	EXC_RST		0x0100		/* Reset; all but IBM4xx */
+#define	EXC_MCHK	0x0200		/* Machine Check */
+#define	EXC_DSI		0x0300		/* Data Storage Interrupt */
+#define	EXC_DSE		0x0380		/* Data Segment Interrupt */
+#define	EXC_ISI		0x0400		/* Instruction Storage Interrupt */
+#define	EXC_ISE		0x0480		/* Instruction Segment Interrupt */
+#define	EXC_EXI		0x0500		/* External Interrupt */
+#define	EXC_ALI		0x0600		/* Alignment Interrupt */
+#define	EXC_PGM		0x0700		/* Program Interrupt */
+#define	EXC_FPU		0x0800		/* Floating-point Unavailable */
+#define	EXC_DECR	0x0900		/* Decrementer Interrupt */
+#define	EXC_SC		0x0c00		/* System Call */
+#define	EXC_TRC		0x0d00		/* Trace */
+#define	EXC_FPA		0x0e00		/* Floating-point Assist */
+
+/* The following is only available on the 601: */
+#define	EXC_RUNMODETRC	0x2000		/* Run Mode/Trace Exception */
+
+/* The following are only available on 970(G5): */
+#define	EXC_VECAST_G5	0x1700		/* AltiVec Assist */
+
+/* The following are only available on 7400(G4): */
+#define	EXC_VEC		0x0f20		/* AltiVec Unavailable */
+#define	EXC_VECAST_G4	0x1600		/* AltiVec Assist */
+
+/* The following are only available on 604/750/7400: */
+#define	EXC_PERF	0x0f00		/* Performance Monitoring */
+#define	EXC_BPT		0x1300		/* Instruction Breakpoint */
+#define	EXC_SMI		0x1400		/* System Managment Interrupt */
+
+/* The following are only available on 750/7400: */
+#define	EXC_THRM	0x1700		/* Thermal Management Interrupt */
+
+/* And these are only on the 603: */
+#define	EXC_IMISS	0x1000		/* Instruction translation miss */
+#define	EXC_DLMISS	0x1100		/* Data load translation miss */
+#define	EXC_DSMISS	0x1200		/* Data store translation miss */
+
+/* The following are available on 4xx and 85xx */
+#define	EXC_CRIT	0x0100		/* Critical Input Interrupt */
+#define	EXC_PIT		0x1000		/* Programmable Interval Timer */
+#define	EXC_FIT		0x1010		/* Fixed Interval Timer */
+#define	EXC_WDOG	0x1020		/* Watchdog Timer */
+#define	EXC_DTMISS	0x1100		/* Data TLB Miss */
+#define	EXC_ITMISS	0x1200		/* Instruction TLB Miss */
+#define	EXC_APU		0x1300		/* Auxiliary Processing Unit */
+#define	EXC_DEBUG	0x2000		/* Debug trap */
+
+#define	EXC_LAST	0x2f00		/* Last possible exception vector */
+
+#define	EXC_AST		0x3000		/* Fake AST vector */
+
+/* Trap was in user mode */
+#define	EXC_USER	0x10000
+
+
+/*
+ * EXC_ALI sets bits in the DSISR and DAR to provide enough
+ * information to recover from the unaligned access without needing to
+ * parse the offending instruction. This includes certain bits of the
+ * opcode, and information about what registers are used. The opcode
+ * indicator values below come from Appendix F of Book III of "The
+ * PowerPC Architecture".
+ */
+
+#define EXC_ALI_OPCODE_INDICATOR(dsisr) ((dsisr >> 10) & 0x7f)
+#define EXC_ALI_LFD	0x09
+#define EXC_ALI_STFD	0x0b
+
+/* Macros to extract register information */
+#define EXC_ALI_RST(dsisr) ((dsisr >> 5) & 0x1f)   /* source or target */
+#define EXC_ALI_RA(dsisr) (dsisr & 0x1f)
+
+/*
+ * SRR1 bits for program exception traps. These identify what caused
+ * the program exception. See section 6.5.9 of the Power ISA Version
+ * 2.05.
+ */
+
+#define	EXC_PGM_FPENABLED	(1UL << 20)
+#define	EXC_PGM_ILLEGAL		(1UL << 19)
+#define	EXC_PGM_PRIV		(1UL << 18)
+#define	EXC_PGM_TRAP		(1UL << 17)
+
+#ifndef LOCORE
+struct	trapframe;
+void    trap(struct trapframe *);
 #endif
 
+#endif	/* _POWERPC_TRAP_H_ */
diff --git a/sys/powerpc/include/trap_aim.h b/sys/powerpc/include/trap_aim.h
deleted file mode 100644
index eb7322c..0000000
--- a/sys/powerpc/include/trap_aim.h
+++ /dev/null
@@ -1,127 +0,0 @@
-/*-
- * Copyright (C) 1995, 1996 Wolfgang Solfrank.
- * Copyright (C) 1995, 1996 TooLs GmbH.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 3. All advertising materials mentioning features or use of this software
- *    must display the following acknowledgement:
- *	This product includes software developed by TooLs GmbH.
- * 4. The name of TooLs GmbH may not be used to endorse or promote products
- *    derived from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY TOOLS GMBH ``AS IS'' AND ANY EXPRESS OR
- * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
- * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
- * IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
- * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
- * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
- * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
- * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
- * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
- * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- * $NetBSD: trap.h,v 1.7 2002/02/22 13:51:40 kleink Exp $
- * $FreeBSD$
- */
-
-#ifndef	_POWERPC_TRAP_H_
-#define	_POWERPC_TRAP_H_
-
-#define	EXC_RSVD	0x0000		/* Reserved */
-#define	EXC_RST		0x0100		/* Reset; all but IBM4xx */
-#define	EXC_MCHK	0x0200		/* Machine Check */
-#define	EXC_DSI		0x0300		/* Data Storage Interrupt */
-#define	EXC_DSE		0x0380		/* Data Segment Interrupt */
-#define	EXC_ISI		0x0400		/* Instruction Storage Interrupt */
-#define	EXC_ISE		0x0480		/* Instruction Segment Interrupt */
-#define	EXC_EXI		0x0500		/* External Interrupt */
-#define	EXC_ALI		0x0600		/* Alignment Interrupt */
-#define	EXC_PGM		0x0700		/* Program Interrupt */
-#define	EXC_FPU		0x0800		/* Floating-point Unavailable */
-#define	EXC_DECR	0x0900		/* Decrementer Interrupt */
-#define	EXC_SC		0x0c00		/* System Call */
-#define	EXC_TRC		0x0d00		/* Trace */
-#define	EXC_FPA		0x0e00		/* Floating-point Assist */
-
-/* The following is only available on the 601: */
-#define	EXC_RUNMODETRC	0x2000		/* Run Mode/Trace Exception */
-
-/* The following are only available on 970(G5): */
-#define	EXC_VECAST_G5	0x1700		/* AltiVec Assist */
-
-/* The following are only available on 7400(G4): */
-#define	EXC_VEC		0x0f20		/* AltiVec Unavailable */
-#define	EXC_VECAST_G4	0x1600		/* AltiVec Assist */
-
-/* The following are only available on 604/750/7400: */
-#define	EXC_PERF	0x0f00		/* Performance Monitoring */
-#define	EXC_BPT		0x1300		/* Instruction Breakpoint */
-#define	EXC_SMI		0x1400		/* System Managment Interrupt */
-
-/* The following are only available on 750/7400: */
-#define	EXC_THRM	0x1700		/* Thermal Management Interrupt */
-
-/* And these are only on the 603: */
-#define	EXC_IMISS	0x1000		/* Instruction translation miss */
-#define	EXC_DLMISS	0x1100		/* Data load translation miss */
-#define	EXC_DSMISS	0x1200		/* Data store translation miss */
-
-/* The following are available on 4xx and 85xx */
-#define	EXC_CII		0x0100		/* Critical Input Interrupt */
-#define	EXC_PIT		0x1000		/* Programmable Interval Timer */
-#define	EXC_FIT		0x1010		/* Fixed Interval Timer */
-#define	EXC_WDOG	0x1020		/* Watchdog Timer */
-#define	EXC_DTMISS	0x1100		/* Data TLB Miss */
-#define	EXC_ITMISS	0x1200		/* Instruction TLB Miss */
-#define	EXC_DEBUG	0x2000		/* Debug trap */
-
-#define	EXC_LAST	0x2f00		/* Last possible exception vector */
-
-#define	EXC_AST		0x3000		/* Fake AST vector */
-
-/* Trap was in user mode */
-#define	EXC_USER	0x10000
-
-
-/*
- * EXC_ALI sets bits in the DSISR and DAR to provide enough
- * information to recover from the unaligned access without needing to
- * parse the offending instruction. This includes certain bits of the
- * opcode, and information about what registers are used. The opcode
- * indicator values below come from Appendix F of Book III of "The
- * PowerPC Architecture".
- */
-
-#define EXC_ALI_OPCODE_INDICATOR(dsisr) ((dsisr >> 10) & 0x7f)
-#define EXC_ALI_LFD	0x09
-#define EXC_ALI_STFD	0x0b
-
-/* Macros to extract register information */
-#define EXC_ALI_RST(dsisr) ((dsisr >> 5) & 0x1f)   /* source or target */
-#define EXC_ALI_RA(dsisr) (dsisr & 0x1f)
-
-/*
- * SRR1 bits for program exception traps. These identify what caused
- * the program exception. See section 6.5.9 of the Power ISA Version
- * 2.05.
- */
-
-#define	EXC_PGM_FPENABLED	(1UL << 20)
-#define	EXC_PGM_ILLEGAL		(1UL << 19)
-#define	EXC_PGM_PRIV		(1UL << 18)
-#define	EXC_PGM_TRAP		(1UL << 17)
-
-#ifndef LOCORE
-struct	trapframe;
-void    trap(struct trapframe *);
-#endif
-
-#endif	/* _POWERPC_TRAP_H_ */
diff --git a/sys/powerpc/include/trap_booke.h b/sys/powerpc/include/trap_booke.h
deleted file mode 100644
index b19fc33..0000000
--- a/sys/powerpc/include/trap_booke.h
+++ /dev/null
@@ -1,60 +0,0 @@
-/*-
- * Copyright (C) 2006 Semihalf, Rafal Jaworowski <raj@semihalf.com>
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 3. The name of the author may not be used to endorse or promote products
- *    derived from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
- * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
- * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN
- * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
- * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
- * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
- * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
- * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
- * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
- * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- * $FreeBSD$
- */
-
-#ifndef	_POWERPC_TRAP_H_
-#define	_POWERPC_TRAP_H_
-
-#define	EXC_CRIT	0
-#define	EXC_MCHK	1
-#define	EXC_DSI		2
-#define	EXC_ISI		3
-#define	EXC_EXI		4
-#define	EXC_ALI		5
-#define	EXC_PGM		6
-#define	EXC_FPU		7	/* e500: not supported */
-#define	EXC_SC		8
-#define	EXC_APU		9	/* e500: not supported */
-#define	EXC_DECR	10
-#define	EXC_FIT		11
-#define	EXC_WDOG	12
-#define	EXC_DTMISS	13
-#define	EXC_ITMISS	14
-#define	EXC_DEBUG	15
-
-#define	EXC_SAU		32	/* e500-specific: SPE APU unavailable */
-#define	EXC_PERF	35	/* e500-specific: Performance monitor */
-
-#define	EXC_LAST	255
-
-#ifndef LOCORE
-struct	trapframe;
-void    trap(struct trapframe *);
-#endif
-
-#endif	/* _POWERPC_TRAP_H_ */