Unify and generalize PowerPC headers, adjust AIM code accordingly.

Rework of this area is a pre-requirement for importing e500 support (and
other PowerPC core variations in the future). Mainly the following
headers are refactored so that we can cover for low-level differences between
various machines within PowerPC architecture:

  <machine/pcpu.h>
  <machine/pcb.h>
  <machine/kdb.h>
  <machine/hid.h>
  <machine/frame.h>

Areas which use the above are adjusted and cleaned up.

Credits for this rework go to marcel@

Approved by:	cognet (mentor)
MFp4:		e500

1 files changed, 55 insertions, 4 deletions

diff --git a/sys/powerpc/include/pcpu.h b/sys/powerpc/include/pcpu.h
index 6e95076..0aa0a54 100644
--- a/sys/powerpc/include/pcpu.h
+++ b/sys/powerpc/include/pcpu.h
@@ -36,24 +36,75 @@
 struct pmap;
 #define	CPUSAVE_LEN	8
 
-#define	PCPU_MD_FIELDS							\
+#define	PCPU_MD_COMMON_FIELDS						\
 	int		pc_inside_intr;					\
 	struct pmap	*pc_curpmap;		/* current pmap */	\
-        struct thread   *pc_fputhread;          /* current fpu user */  \
+	struct thread	*pc_fputhread;		/* current fpu user */  \
 	register_t	pc_tempsave[CPUSAVE_LEN];			\
 	register_t	pc_disisave[CPUSAVE_LEN];			\
 	register_t	pc_dbsave[CPUSAVE_LEN];
 
+#define PCPU_MD_AIM_FIELDS
+
+#define	BOOKE_CRITSAVE_LEN	(CPUSAVE_LEN + 2)
+#define	BOOKE_TLB_MAXNEST	3
+#define	BOOKE_TLB_SAVELEN	16
+#define	BOOKE_TLBSAVE_LEN	(BOOKE_TLB_SAVELEN * BOOKE_TLB_MAXNEST)
+
+#define PCPU_MD_BOOKE_FIELDS						\
+	register_t	pc_booke_critsave[BOOKE_CRITSAVE_LEN];		\
+	register_t	pc_booke_mchksave[CPUSAVE_LEN];			\
+	register_t	pc_booke_tlbsave[BOOKE_TLBSAVE_LEN];		\
+	register_t	pc_booke_tlb_level;
+
 /* Definitions for register offsets within the exception tmp save areas */
 #define	CPUSAVE_R28	0		/* where r28 gets saved */
 #define	CPUSAVE_R29	1		/* where r29 gets saved */
 #define	CPUSAVE_R30	2		/* where r30 gets saved */
 #define	CPUSAVE_R31	3		/* where r31 gets saved */
-#define	CPUSAVE_DAR	4		/* where SPR_DAR gets saved */
-#define	CPUSAVE_DSISR	5		/* where SPR_DSISR gets saved */
+#define	CPUSAVE_AIM_DAR		4	/* where SPR_DAR gets saved */
+#define	CPUSAVE_AIM_DSISR	5	/* where SPR_DSISR gets saved */
+#define	CPUSAVE_BOOKE_DEAR	4	/* where SPR_DEAR gets saved */
+#define	CPUSAVE_BOOKE_ESR	5	/* where SPR_ESR gets saved */
 #define	CPUSAVE_SRR0	6		/* where SRR0 gets saved */
 #define	CPUSAVE_SRR1	7		/* where SRR1 gets saved */
 
+/* Book-E TLBSAVE is more elaborate */
+#define TLBSAVE_BOOKE_LR	0
+#define TLBSAVE_BOOKE_CR	1
+#define TLBSAVE_BOOKE_SRR0	2
+#define TLBSAVE_BOOKE_SRR1	3
+#define TLBSAVE_BOOKE_R20	4
+#define TLBSAVE_BOOKE_R21	5
+#define TLBSAVE_BOOKE_R22	6
+#define TLBSAVE_BOOKE_R23	7
+#define TLBSAVE_BOOKE_R24	8
+#define TLBSAVE_BOOKE_R25	9
+#define TLBSAVE_BOOKE_R26	10
+#define TLBSAVE_BOOKE_R27	11
+#define TLBSAVE_BOOKE_R28	12
+#define TLBSAVE_BOOKE_R29	13
+#define TLBSAVE_BOOKE_R30	14
+#define TLBSAVE_BOOKE_R31	15
+
+#ifndef COMPILING_LINT
+#ifdef AIM
+#define	PCPU_MD_FIELDS		\
+	PCPU_MD_COMMON_FIELDS	\
+	PCPU_MD_AIM_FIELDS
+#endif
+#ifdef E500
+#define	PCPU_MD_FIELDS		\
+	PCPU_MD_COMMON_FIELDS	\
+	PCPU_MD_BOOKE_FIELDS
+#endif
+#else
+#define	PCPU_MD_FIELDS		\
+	PCPU_MD_COMMON_FIELDS	\
+	PCPU_MD_AIM_FIELDS	\
+	PCPU_MD_BOOKE_FIELDS
+#endif
+
 #define PCPUP	((struct pcpu *) powerpc_get_pcpup())
 
 #define	PCPU_GET(member)	(PCPUP->pc_ ## member)