With retirement of cpumask_t and usage of cpuset_t for representing a

mask of CPUs, pc_other_cpus and pc_cpumask become highly inefficient.

Remove them and replace their usage with custom pc_cpuid magic (as,
atm, pc_cpumask can be easilly represented by (1 << pc_cpuid) and
pc_other_cpus by (all_cpus & ~(1 << pc_cpuid))).

This change is not targeted for MFC because of struct pcpu members
removal and dependency by cpumask_t retirement.

MD review by:	marcel, marius, alc
Tested by:	pluknet
MD testing by:	marcel, marius, gonzo, andreast

1 files changed, 6 insertions, 6 deletions

diff --git a/sys/powerpc/booke/pmap.c b/sys/powerpc/booke/pmap.c
index e1cd071..18068fc 100644
--- a/sys/powerpc/booke/pmap.c
+++ b/sys/powerpc/booke/pmap.c
@@ -1826,6 +1826,7 @@ static void
 mmu_booke_activate(mmu_t mmu, struct thread *td)
 {
 	pmap_t pmap;
+	u_int cpuid;
 
 	pmap = &td->td_proc->p_vmspace->vm_pmap;
 
@@ -1836,14 +1837,15 @@ mmu_booke_activate(mmu_t mmu, struct thread *td)
 
 	mtx_lock_spin(&sched_lock);
 
-	CPU_OR_ATOMIC(&pmap->pm_active, PCPU_PTR(cpumask));
+	cpuid = PCPU_GET(cpuid);
+	CPU_SET_ATOMIC(cpuid, &pmap->pm_active);
 	PCPU_SET(curpmap, pmap);
 	
-	if (pmap->pm_tid[PCPU_GET(cpuid)] == TID_NONE)
+	if (pmap->pm_tid[cpuid] == TID_NONE)
 		tid_alloc(pmap);
 
 	/* Load PID0 register with pmap tid value. */
-	mtspr(SPR_PID0, pmap->pm_tid[PCPU_GET(cpuid)]);
+	mtspr(SPR_PID0, pmap->pm_tid[cpuid]);
 	__asm __volatile("isync");
 
 	mtx_unlock_spin(&sched_lock);
@@ -1865,9 +1867,7 @@ mmu_booke_deactivate(mmu_t mmu, struct thread *td)
 	CTR5(KTR_PMAP, "%s: td=%p, proc = '%s', id = %d, pmap = 0x%08x",
 	    __func__, td, td->td_proc->p_comm, td->td_proc->p_pid, pmap);
 
-	sched_pin();
-	CPU_NAND_ATOMIC(&pmap->pm_active, PCPU_PTR(cpumask));
-	sched_unpin();
+	CPU_CLR_ATOMIC(PCPU_GET(cpuid), &pmap->pm_active);
 	PCPU_SET(curpmap, NULL);
 }