MFC r258268, r258271, r258272, r258274, r258275, r258427, r258694, r258696,

    r258697, r258757

  Do not assume a value for #address-cells when parsing the OF translations
  map. This allows the kernel to get farther with OpenBIOS on 64-bit CPUs.

  Actually look up #address-cells instead of assuming it is correlated with
  the Uninorth version number.

  #interrupt-cells belongs to the iparent, not the device parent.

  Add a sysctl to allow disabling resetting the OF syscons.

  For PCI<->PCI bridges, #address-cells may be 3.

  Make RTAS calls, which call setfault() to recover from machine checks,
  preserve any existing fault buffer.

  badaddr() is used only in the grackle PCI driver, so move its definition
  there. Clean up a spurious setfault() declaration as well.

  This [phyp_console] driver doesn't need the /options node, so don't check
  for it.

  Use the Open Firmware-based CPU frequency determination as a generic
  fallback if we can't measure CPU frequency. This is also useful on a
  variety of embedded systems using FDT.

3 files changed, 27 insertions, 78 deletions

diff --git a/sys/powerpc/aim/machdep.c b/sys/powerpc/aim/machdep.c
index 72f9de7..c4c7383 100644
--- a/sys/powerpc/aim/machdep.c
+++ b/sys/powerpc/aim/machdep.c
@@ -159,8 +159,6 @@ SYSCTL_INT(_machdep, CPU_CACHELINE, cacheline_size,
 
 uintptr_t	powerpc_init(vm_offset_t, vm_offset_t, vm_offset_t, void *);
 
-int             setfault(faultbuf);             /* defined in locore.S */
-
 long		Maxmem = 0;
 long		realmem = 0;
 
diff --git a/sys/powerpc/aim/mmu_oea64.c b/sys/powerpc/aim/mmu_oea64.c
index 0669f66..b47b94d 100644
--- a/sys/powerpc/aim/mmu_oea64.c
+++ b/sys/powerpc/aim/mmu_oea64.c
@@ -180,8 +180,7 @@ uintptr_t moea64_get_unique_vsid(void);
 struct ofw_map {
 	cell_t	om_va;
 	cell_t	om_len;
-	cell_t	om_pa_hi;
-	cell_t	om_pa_lo;
+	uint64_t om_pa;
 	cell_t	om_mode;
 };
 
@@ -471,13 +470,9 @@ om_cmp(const void *a, const void *b)
 
 	mapa = a;
 	mapb = b;
-	if (mapa->om_pa_hi < mapb->om_pa_hi)
+	if (mapa->om_pa < mapb->om_pa)
 		return (-1);
-	else if (mapa->om_pa_hi > mapb->om_pa_hi)
-		return (1);
-	else if (mapa->om_pa_lo < mapb->om_pa_lo)
-		return (-1);
-	else if (mapa->om_pa_lo > mapb->om_pa_lo)
+	else if (mapa->om_pa > mapb->om_pa)
 		return (1);
 	else
 		return (0);
@@ -486,26 +481,41 @@ om_cmp(const void *a, const void *b)
 static void
 moea64_add_ofw_mappings(mmu_t mmup, phandle_t mmu, size_t sz)
 {
-	struct ofw_map	translations[sz/sizeof(struct ofw_map)];
+	struct ofw_map	translations[sz/(4*sizeof(cell_t))]; /*>= 4 cells per */
+	pcell_t		acells, trans_cells[sz/sizeof(cell_t)];
 	register_t	msr;
 	vm_offset_t	off;
 	vm_paddr_t	pa_base;
-	int		i;
+	int		i, j;
 
 	bzero(translations, sz);
-	if (OF_getprop(mmu, "translations", translations, sz) == -1)
+	OF_getprop(OF_finddevice("/"), "#address-cells", &acells,
+	    sizeof(acells));
+	if (OF_getprop(mmu, "translations", trans_cells, sz) == -1)
 		panic("moea64_bootstrap: can't get ofw translations");
 
 	CTR0(KTR_PMAP, "moea64_add_ofw_mappings: translations");
-	sz /= sizeof(*translations);
+	sz /= sizeof(cell_t);
+	for (i = 0, j = 0; i < sz; j++) {
+		translations[j].om_va = trans_cells[i++];
+		translations[j].om_len = trans_cells[i++];
+		translations[j].om_pa = trans_cells[i++];
+		if (acells == 2) {
+			translations[j].om_pa <<= 32;
+			translations[j].om_pa |= trans_cells[i++];
+		}
+		translations[j].om_mode = trans_cells[i++];
+	}
+	KASSERT(i == sz, ("Translations map has incorrect cell count (%d/%zd)",
+	    i, sz));
+
+	sz = j;
 	qsort(translations, sz, sizeof (*translations), om_cmp);
 
 	for (i = 0; i < sz; i++) {
-		pa_base = translations[i].om_pa_lo;
-	      #ifdef __powerpc64__
-		pa_base += (vm_offset_t)translations[i].om_pa_hi << 32;
-	      #else
-		if (translations[i].om_pa_hi)
+		pa_base = translations[i].om_pa;
+	      #ifndef __powerpc64__
+		if ((translations[i].om_pa >> 32) != 0)
 			panic("OFW translations above 32-bit boundary!");
 	      #endif
 
diff --git a/sys/powerpc/aim/trap.c b/sys/powerpc/aim/trap.c
index 025b5cf..055603c 100644
--- a/sys/powerpc/aim/trap.c
+++ b/sys/powerpc/aim/trap.c
@@ -89,12 +89,6 @@ static int	handle_user_slb_spill(pmap_t pm, vm_offset_t addr);
 extern int	n_slbs;
 #endif
 
-int	setfault(faultbuf);		/* defined in locore.S */
-
-/* Why are these not defined in a header? */
-int	badaddr(void *, size_t);
-int	badaddr_read(void *, size_t, int *);
-
 struct powerpc_exception {
 	u_int	vector;
 	char	*name;
@@ -695,59 +689,6 @@ trap_pfault(struct trapframe *frame, int user)
 	return (SIGSEGV);
 }
 
-int
-badaddr(void *addr, size_t size)
-{
-	return (badaddr_read(addr, size, NULL));
-}
-
-int
-badaddr_read(void *addr, size_t size, int *rptr)
-{
-	struct thread	*td;
-	faultbuf	env;
-	int		x;
-
-	/* Get rid of any stale machine checks that have been waiting.  */
-	__asm __volatile ("sync; isync");
-
-	td = curthread;
-
-	if (setfault(env)) {
-		td->td_pcb->pcb_onfault = 0;
-		__asm __volatile ("sync");
-		return 1;
-	}
-
-	__asm __volatile ("sync");
-
-	switch (size) {
-	case 1:
-		x = *(volatile int8_t *)addr;
-		break;
-	case 2:
-		x = *(volatile int16_t *)addr;
-		break;
-	case 4:
-		x = *(volatile int32_t *)addr;
-		break;
-	default:
-		panic("badaddr: invalid size (%zd)", size);
-	}
-
-	/* Make sure we took the machine check, if we caused one. */
-	__asm __volatile ("sync; isync");
-
-	td->td_pcb->pcb_onfault = 0;
-	__asm __volatile ("sync");	/* To be sure. */
-
-	/* Use the value to avoid reorder. */
-	if (rptr)
-		*rptr = x;
-
-	return (0);
-}
-
 /*
  * For now, this only deals with the particular unaligned access case
  * that gcc tends to generate.  Eventually it should handle all of the