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| author | nwhitehorn <nwhitehorn@FreeBSD.org> | 2012-05-04 16:00:22 +0000 |
|---|---|---|
| committer | nwhitehorn <nwhitehorn@FreeBSD.org> | 2012-05-04 16:00:22 +0000 |
| commit | 68e9eabdbf1a8b9a1461c0a249d893b2c5223f45 (patch) | |
| tree | ecee53979b0f999ca24600814860dd57b6ca0ca3 /sys/powerpc/aim | |
| parent | 4ee7205a6e0fa4716b49b495f88a3f51579b9ab0 (diff) | |
| download | FreeBSD-src-68e9eabdbf1a8b9a1461c0a249d893b2c5223f45.zip FreeBSD-src-68e9eabdbf1a8b9a1461c0a249d893b2c5223f45.tar.gz | |
Fix final bugs in memory barriers on PowerPC:
- Use isync/lwsync unconditionally for acquire/release. Use of isync
guarantees a complete memory barrier, which is important for serialization
of bus space accesses with mutexes on multi-processor systems.
- Go back to using sync as the I/O memory barrier, which solves the same
problem as above with respect to mutex release using lwsync, while not
penalizing non-I/O operations like a return to sync on the atomic release
operations would.
- Place an acquisition barrier around thread lock acquisition in
cpu_switchin().
Diffstat (limited to 'sys/powerpc/aim')
| -rw-r--r-- | sys/powerpc/aim/swtch32.S | 3 | ||||
| -rw-r--r-- | sys/powerpc/aim/swtch64.S | 3 |
2 files changed, 4 insertions, 2 deletions
diff --git a/sys/powerpc/aim/swtch32.S b/sys/powerpc/aim/swtch32.S index 76bb0f4..fa87aba 100644 --- a/sys/powerpc/aim/swtch32.S +++ b/sys/powerpc/aim/swtch32.S @@ -124,7 +124,8 @@ cpu_switchin: blocked_loop: lwz %r7,TD_LOCK(%r2) cmpw %r6,%r7 - beq blocked_loop + beq- blocked_loop + isync #endif mfsprg %r7,0 /* Get the pcpu pointer */ diff --git a/sys/powerpc/aim/swtch64.S b/sys/powerpc/aim/swtch64.S index 857ae40..ab6f532 100644 --- a/sys/powerpc/aim/swtch64.S +++ b/sys/powerpc/aim/swtch64.S @@ -150,7 +150,8 @@ cpu_switchin: blocked_loop: ld %r7,TD_LOCK(%r13) cmpd %r6,%r7 - beq blocked_loop + beq- blocked_loop + isync #endif mfsprg %r7,0 /* Get the pcpu pointer */ |
