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authoryongari <yongari@FreeBSD.org>2007-07-06 00:05:12 +0000
committeryongari <yongari@FreeBSD.org>2007-07-06 00:05:12 +0000
commit41a07d4d3ed596bc52238ff2b0c061115495f429 (patch)
tree6deb420e5a9b65a59d419897cc24f4c09264430c /sys/pci
parente42751c5a9fa09efc4ab503f438a16903713deba (diff)
downloadFreeBSD-src-41a07d4d3ed596bc52238ff2b0c061115495f429.zip
FreeBSD-src-41a07d4d3ed596bc52238ff2b0c061115495f429.tar.gz
re(4) devices requires an external EEPROM. Depending on models it
would be 93C46(1Kbit) or 93C56(2Kbit). One of differences between them is number of address lines required to access the EEPROM. For example, 93C56 EEPROM needs 8 address lines to read/write data. If 93C56 recevied premature end of required number of serial clock(CLK) to set OP code/address of EEPROM, the result would be unexpected behavior. Previously it tried to detect 93C46, which requires 6 address lines, and then assumed it would be 93C56 if read data was not expected value. However, this approach didn't work in some models/situations as 93C56 requries 8 address lines to access its data. In order to fix it, change EEPROM probing order such that 93C56 is detected reliably. While I'm here change hard-coded address line numbers with defined constant to enhance readability. PR: 112710 Approved by: re (mux)
Diffstat (limited to 'sys/pci')
-rw-r--r--sys/pci/if_rlreg.h2
1 files changed, 2 insertions, 0 deletions
diff --git a/sys/pci/if_rlreg.h b/sys/pci/if_rlreg.h
index 8377f35..009272c 100644
--- a/sys/pci/if_rlreg.h
+++ b/sys/pci/if_rlreg.h
@@ -312,6 +312,8 @@
#define RL_EEMODE_WRITECFG (0x80|0x40)
/* 9346 EEPROM commands */
+#define RL_9346_ADDR_LEN 6 /* 93C46 1K: 128x16 */
+#define RL_9356_ADDR_LEN 8 /* 93C56 2K: 256x16 */
#define RL_9346_WRITE 0x5
#define RL_9346_READ 0x6
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