if_rl.c: make a small tweak to properly handle the Accton MPX 5030/5038

         as a RealTek 8139
if_rlreg.h: use bus_space_read_X() in CSR_READ_X() macros instead of
            directly calling inb()/outb() etc...
rl.4 + RELNOTES.TXT: mention that SMC EtherEZ PCI 1211-TX is supported
                     by the RealTek driver

2 files changed, 28 insertions, 46 deletions

diff --git a/sys/pci/if_rl.c b/sys/pci/if_rl.c
index df61a25..6d929b2 100644
--- a/sys/pci/if_rl.c
+++ b/sys/pci/if_rl.c
@@ -29,7 +29,7 @@
  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
  * THE POSSIBILITY OF SUCH DAMAGE.
  *
- *	$Id: if_rl.c,v 1.2 1998/11/18 21:03:57 wpaul Exp $
+ *	$Id: if_rl.c,v 1.16 1998/12/07 00:16:44 wpaul Exp $
  */
 
 /*
@@ -53,7 +53,7 @@
  *
  * For transmission, the chip offers a series of four TX descriptor
  * registers. Each transmit frame must be in a contiguous buffer, aligned
- * on a doubleword (32-bit) boundary. This means we almost always have to
+ * on a longword (32-bit) boundary. This means we almost always have to
  * do mbuf copies in order to transmit a frame, except in the unlikely
  * case where a) the packet fits into a single mbuf, and b) the packet
  * is 32-bit aligned within the mbuf's data area. The presence of only
@@ -81,15 +81,6 @@
  * chip. The 8129 has a serial MDIO interface for accessing the MII where
  * the 8139 lets you directly access the on-board PHY registers. We need
  * to select which interface to use depending on the chip type.
- *
- * Note: beware of trying to use the Linux RealTek driver as a reference
- * for information about the RealTek chip. It contains several bogosities.
- * It contains definitions for several undocumented registers which it
- * claims are 'required for proper operation' yet it does not use these
- * registers anywhere in the code. It also refers to some undocumented
- * 'Twister tuning codes' which it doesn't use anywhere. It also contains
- * bit definitions for several registers which are totally ignored: magic
- * numbers are used instead, making the code hard to read.
  */
 
 #include "bpfilter.h"
@@ -115,6 +106,9 @@
 #include <vm/vm.h>              /* for vtophys */
 #include <vm/pmap.h>            /* for vtophys */
 #include <machine/clock.h>      /* for DELAY */
+#include <machine/bus_pio.h>
+#include <machine/bus_memio.h>
+#include <machine/bus.h>
 
 #include <pci/pcireg.h>
 #include <pci/pcivar.h>
@@ -133,7 +127,7 @@
 
 #ifndef lint
 static char rcsid[] =
-	"$Id: if_rl.c,v 1.2 1998/11/18 21:03:57 wpaul Exp $";
+	"$Id: if_rl.c,v 1.16 1998/12/07 00:16:44 wpaul Exp $";
 #endif
 
 /*
@@ -1083,7 +1077,12 @@ rl_attach(config_id, unit)
 		goto fail;
 	}
 
-	sc->iobase = pci_conf_read(config_id, RL_PCI_LOIO) & 0xFFFFFFFC;
+	if (!pci_map_port(config_id, RL_PCI_LOIO,
+				(u_int16_t *)&(sc->rl_bhandle))) {
+		printf ("rl%d: couldn't map ports\n", unit);
+		goto fail;
+	}
+	sc->rl_btag = I386_BUS_SPACE_IO;
 #else
 	if (!(command & PCIM_CMD_MEMEN)) {
 		printf("rl%d: failed to enable memory mapping!\n", unit);
@@ -1094,7 +1093,8 @@ rl_attach(config_id, unit)
 		printf ("rl%d: couldn't map memory\n", unit);
 		goto fail;
 	}
-	sc->csr = (volatile caddr_t)vbase;
+	sc->rl_btag = I386_BUS_SPACE_MEM;
+	sc->rl_bhandle = vbase;
 #endif
 
 	/* Allocate interrupt */
@@ -1125,7 +1125,7 @@ rl_attach(config_id, unit)
 	 */
 	rl_read_eeprom(sc, (caddr_t)&rl_did, RL_EE_PCI_DID, 1, 0);
 
-	if (rl_did == RT_DEVICEID_8139)
+	if (rl_did == RT_DEVICEID_8139 || rl_did == ACCTON_DEVICEID_5030)
 		sc->rl_type = RL_8139;
 	else if (rl_did == RT_DEVICEID_8129)
 		sc->rl_type = RL_8129;
diff --git a/sys/pci/if_rlreg.h b/sys/pci/if_rlreg.h
index 1825dbc..5263b5a 100644
--- a/sys/pci/if_rlreg.h
+++ b/sys/pci/if_rlreg.h
@@ -29,7 +29,7 @@
  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
  * THE POSSIBILITY OF SUCH DAMAGE.
  *
- *	$Id: if_rlreg.h,v 1.13 1998/11/18 20:27:28 wpaul Exp $
+ *	$Id: if_rlreg.h,v 1.14 1998/12/07 00:16:44 wpaul Exp $
  */
 
 /*
@@ -331,10 +331,8 @@ struct rl_mii_frame {
 struct rl_softc {
 	struct arpcom		arpcom;		/* interface info */
 	struct ifmedia		ifmedia;	/* media info */
-	u_int32_t		iobase;		/* pointer to PIO space */
-#ifndef RL_USEIOSPACE
-	volatile caddr_t	csr;		/* pointer to register map */
-#endif
+	bus_space_handle_t	rl_bhandle;	/* bus space handle */
+	bus_space_tag_t		rl_btag;	/* bus space tag */
 	struct rl_type		*rl_pinfo;	/* phy info */
 	u_int8_t		rl_unit;	/* interface number */
 	u_int8_t		rl_type;
@@ -349,35 +347,19 @@ struct rl_softc {
 /*
  * register space access macros
  */
-#ifdef RL_USEIOSPACE
 #define CSR_WRITE_4(sc, reg, val)	\
-	outl(sc->iobase + (u_int32_t)(reg), val)
+	bus_space_write_4(sc->rl_btag, sc->rl_bhandle, reg, val)
 #define CSR_WRITE_2(sc, reg, val)	\
-	outw(sc->iobase + (u_int32_t)(reg), val)
+	bus_space_write_2(sc->rl_btag, sc->rl_bhandle, reg, val)
 #define CSR_WRITE_1(sc, reg, val)	\
-	outb(sc->iobase + (u_int32_t)(reg), val)
-
-#define CSR_READ_4(sc, reg)	\
-	inl(sc->iobase + (u_int32_t)(reg))
-#define CSR_READ_2(sc, reg)	\
-	inw(sc->iobase + (u_int32_t)(reg))
-#define CSR_READ_1(sc, reg)	\
-	inb(sc->iobase + (u_int32_t)(reg))
-#else
-#define CSR_WRITE_4(sc, reg, val)	\
-	((*(u_int32_t*)((sc)->csr + (u_int32_t)(reg))) = (u_int32_t)(val))
-#define CSR_WRITE_2(sc, reg, val)	\
-	((*(u_int16_t*)((sc)->csr + (u_int32_t)(reg))) = (u_int16_t)(val))
-#define CSR_WRITE_1(sc, reg, val)	\
-	((*(u_int8_t*)((sc)->csr + (u_int32_t)(reg))) = (u_int8_t)(val))
-
-#define CSR_READ_4(sc, reg)	\
-	(*(u_int32_t *)((sc)->csr + (u_int32_t)(reg)))
-#define CSR_READ_2(sc, reg)	\
-	(*(u_int16_t *)((sc)->csr + (u_int32_t)(reg)))
-#define CSR_READ_1(sc, reg)	\
-	(*(u_int8_t *)((sc)->csr + (u_int32_t)(reg)))
-#endif
+	bus_space_write_1(sc->rl_btag, sc->rl_bhandle, reg, val)
+
+#define CSR_READ_4(sc, reg)		\
+	bus_space_read_4(sc->rl_btag, sc->rl_bhandle, reg)
+#define CSR_READ_2(sc, reg)		\
+	bus_space_read_2(sc->rl_btag, sc->rl_bhandle, reg)
+#define CSR_READ_1(sc, reg)		\
+	bus_space_read_1(sc->rl_btag, sc->rl_bhandle, reg)
 
 #define RL_TIMEOUT		1000