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author | avg <avg@FreeBSD.org> | 2016-10-07 18:51:04 +0000 |
---|---|---|
committer | avg <avg@FreeBSD.org> | 2016-10-07 18:51:04 +0000 |
commit | 2c7b2f1315f4dd195123b3799c55e7e3ef393a11 (patch) | |
tree | 7da05bfb7a5acac369432dda53b6da7de878b2aa /sys/pci | |
parent | 0ceb2bad0ea69e77afbcc35c038743dbdd3ccef9 (diff) | |
download | FreeBSD-src-2c7b2f1315f4dd195123b3799c55e7e3ef393a11.zip FreeBSD-src-2c7b2f1315f4dd195123b3799c55e7e3ef393a11.tar.gz |
MFC r306218,306290: amdsbwd, intpm: unify bits specific to AMD chipsets
Diffstat (limited to 'sys/pci')
-rw-r--r-- | sys/pci/intpm.c | 71 |
1 files changed, 34 insertions, 37 deletions
diff --git a/sys/pci/intpm.c b/sys/pci/intpm.c index 397376e..70d62a7 100644 --- a/sys/pci/intpm.c +++ b/sys/pci/intpm.c @@ -43,6 +43,7 @@ __FBSDID("$FreeBSD$"); #include <dev/pci/pcireg.h> #include <dev/pci/pcivar.h> #include <pci/intpmreg.h> +#include <dev/amdsbwd/amd_chipset.h> #include "opt_intpm.h" @@ -103,12 +104,11 @@ intsmb_probe(device_t dev) case 0x43721002: device_set_desc(dev, "ATI IXP400 SMBus Controller"); break; - case 0x43851002: + case AMDSB_SMBUS_DEVID: device_set_desc(dev, "AMD SB600/7xx/8xx/9xx SMBus Controller"); break; - case 0x780b1022: /* AMD FCH */ - if (pci_get_revid(dev) < 0x40) - return (ENXIO); + case AMDFCH_SMBUS_DEVID: /* AMD FCH */ + case AMDCZ_SMBUS_DEVID: /* AMD Carizzo FCH */ device_set_desc(dev, "AMD FCH SMBus Controller"); break; default: @@ -119,7 +119,7 @@ intsmb_probe(device_t dev) } static uint8_t -sb8xx_pmio_read(struct resource *res, uint8_t reg) +amd_pmio_read(struct resource *res, uint8_t reg) { bus_write_1(res, 0, reg); /* Index */ return (bus_read_1(res, 1)); /* Data */ @@ -128,27 +128,18 @@ sb8xx_pmio_read(struct resource *res, uint8_t reg) static int sb8xx_attach(device_t dev) { - static const int AMDSB_PMIO_INDEX = 0xcd6; - static const int AMDSB_PMIO_WIDTH = 2; - static const int AMDSB8_SMBUS_ADDR = 0x2c; - static const int AMDSB8_SMBUS_EN = 0x01; - static const int AMDSB8_SMBUS_ADDR_MASK = ~0x1fu; static const int AMDSB_SMBIO_WIDTH = 0x14; - static const int AMDSB_SMBUS_CFG = 0x10; - static const int AMDSB_SMBUS_IRQ = 0x01; - static const int AMDSB_SMBUS_REV_MASK = ~0x0fu; - static const int AMDSB_SMBUS_REV_SHIFT = 4; - static const int AMDSB_IO_RID = 0; - struct intsmb_softc *sc; struct resource *res; + uint32_t devid; + uint8_t revid; uint16_t addr; - uint8_t cfg; int rid; int rc; + bool enabled; sc = device_get_softc(dev); - rid = AMDSB_IO_RID; + rid = 0; rc = bus_set_resource(dev, SYS_RES_IOPORT, rid, AMDSB_PMIO_INDEX, AMDSB_PMIO_WIDTH); if (rc != 0) { @@ -156,26 +147,38 @@ sb8xx_attach(device_t dev) return (ENXIO); } res = bus_alloc_resource_any(dev, SYS_RES_IOPORT, &rid, - RF_ACTIVE | RF_SHAREABLE); + RF_ACTIVE); if (res == NULL) { device_printf(dev, "bus_alloc_resource for PM IO failed\n"); return (ENXIO); } - addr = sb8xx_pmio_read(res, AMDSB8_SMBUS_ADDR + 1); - addr <<= 8; - addr |= sb8xx_pmio_read(res, AMDSB8_SMBUS_ADDR); + devid = pci_get_devid(dev); + revid = pci_get_revid(dev); + if (devid == AMDSB_SMBUS_DEVID || + (devid == AMDFCH_SMBUS_DEVID && revid < AMDFCH41_SMBUS_REVID) || + (devid == AMDCZ_SMBUS_DEVID && revid < AMDCZ49_SMBUS_REVID)) { + addr = amd_pmio_read(res, AMDSB8_PM_SMBUS_EN + 1); + addr <<= 8; + addr |= amd_pmio_read(res, AMDSB8_PM_SMBUS_EN); + enabled = (addr & AMDSB8_SMBUS_EN) != 0; + addr &= AMDSB8_SMBUS_ADDR_MASK; + } else { + addr = amd_pmio_read(res, AMDFCH41_PM_DECODE_EN0); + enabled = (addr & AMDFCH41_SMBUS_EN) != 0; + addr = amd_pmio_read(res, AMDFCH41_PM_DECODE_EN1); + addr <<= 8; + } bus_release_resource(dev, SYS_RES_IOPORT, rid, res); bus_delete_resource(dev, SYS_RES_IOPORT, rid); - if ((addr & AMDSB8_SMBUS_EN) == 0) { - device_printf(dev, "SB8xx SMBus not enabled\n"); + if (!enabled) { + device_printf(dev, "SB8xx/SB9xx/FCH SMBus not enabled\n"); return (ENXIO); } - addr &= AMDSB8_SMBUS_ADDR_MASK; - sc->io_rid = AMDSB_IO_RID; + sc->io_rid = 0; rc = bus_set_resource(dev, SYS_RES_IOPORT, sc->io_rid, addr, AMDSB_SMBIO_WIDTH); if (rc != 0) { @@ -187,15 +190,8 @@ sb8xx_attach(device_t dev) return (ENXIO); } sc->io_res = bus_alloc_resource_any(dev, SYS_RES_IOPORT, &sc->io_rid, - RF_ACTIVE | RF_SHAREABLE); - cfg = bus_read_1(sc->io_res, AMDSB_SMBUS_CFG); - + RF_ACTIVE); sc->poll = 1; - device_printf(dev, "intr %s disabled ", - (cfg & AMDSB_SMBUS_IRQ) != 0 ? "IRQ" : "SMI"); - printf("revision %d\n", - (cfg & AMDSB_SMBUS_REV_MASK) >> AMDSB_SMBUS_REV_SHIFT); - return (0); } @@ -237,11 +233,12 @@ intsmb_attach(device_t dev) sc->cfg_irq9 = 1; break; #endif - case 0x43851002: - if (pci_get_revid(dev) >= 0x40) + case AMDSB_SMBUS_DEVID: + if (pci_get_revid(dev) >= AMDSB8_SMBUS_REVID) sc->sb8xx = 1; break; - case 0x780b1022: + case AMDFCH_SMBUS_DEVID: + case AMDCZ_SMBUS_DEVID: sc->sb8xx = 1; break; } |