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author | yongari <yongari@FreeBSD.org> | 2008-12-17 08:18:11 +0000 |
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committer | yongari <yongari@FreeBSD.org> | 2008-12-17 08:18:11 +0000 |
commit | 62ee68bb086f87555449fb796d5153418839b5cf (patch) | |
tree | 7ef670de7c8c50c85fce80da7af46f2cc1558dd0 /sys/pci | |
parent | 7efe2ccd487653a48a680daec35810cb43bdb1f2 (diff) | |
download | FreeBSD-src-62ee68bb086f87555449fb796d5153418839b5cf.zip FreeBSD-src-62ee68bb086f87555449fb796d5153418839b5cf.tar.gz |
It seems that RealTek PCIe controllers require an explicit Tx poll
command whenever Tx completion interrupt is raised. The Tx poll
bit is cleared when all packets waiting to be transferred have been
processed. This means the second Tx poll command can be silently
ignored as the Tx poll bit could be still active while processing
of previous Tx poll command is in progress.
To address the issue re(4) used to invoke the Tx poll command in Tx
completion handler whenever it detects there are pending packets in
TxQ. However that still does not seem to completely eliminate
watchdog timeouts seen on RealTek PCIe controllers. To fix the
issue kick Tx poll command only after Tx completion interrupt is
raised as this would indicate Tx is now idle state such that it can
accept new Tx poll command again. While here apply this workaround
for PCIe based controllers as other controllers does not seem to
have this limitation.
Tested by: Victor Balada Diaz < victor <> bsdes DOT net >
Diffstat (limited to 'sys/pci')
-rw-r--r-- | sys/pci/if_rlreg.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/sys/pci/if_rlreg.h b/sys/pci/if_rlreg.h index ccea051..b3569e8 100644 --- a/sys/pci/if_rlreg.h +++ b/sys/pci/if_rlreg.h @@ -891,6 +891,7 @@ struct rl_softc { #define RL_FLAG_PHY8110S 0x0800 #define RL_FLAG_WOLRXENB 0x1000 #define RL_FLAG_MACSLEEP 0x2000 +#define RL_FLAG_PCIE 0x4000 #define RL_FLAG_LINK 0x8000 }; |