Big round of minor updates:

- Use pci_get_powerstate()/pci_set_powerstate() in all the other drivers
  that need them so we don't have to fiddle with the PCI power management
  registers directly.
- Use pci_enable_busmaster()/pci_enable_io() to turn on busmastering and
  PIO/memory mapped accesses.
- Add support to the RealTek driver for the D-Link DFE-530TX+ which has
  a RealTek 8139 with its own PCI ID. (Submitted by Jason Wright)
- Have the SiS 900/National DP83815 driver be sure to disable PME
  mode in sis_reset(). This apparently fixes a problem on some
  motherboards where the DP83815 chip fails to receive packets.
  (Submitted by Chuck McCrobie <mccrobie@cablespeed.com>)

14 files changed, 185 insertions, 197 deletions

diff --git a/sys/pci/if_dc.c b/sys/pci/if_dc.c
index 3b33d11..22037d8 100644
--- a/sys/pci/if_dc.c
+++ b/sys/pci/if_dc.c
@@ -1775,9 +1775,9 @@ static int dc_attach(dev)
 	/*
 	 * Map control/status registers.
 	 */
-	command = pci_read_config(dev, PCIR_COMMAND, 4);
-	command |= (PCIM_CMD_PORTEN|PCIM_CMD_MEMEN|PCIM_CMD_BUSMASTEREN);
-	pci_write_config(dev, PCIR_COMMAND, command, 4);
+	pci_enable_busmaster(dev);
+	pci_enable_io(dev, PCIM_CMD_PORTEN);
+	pci_enable_io(dev, PCIM_CMD_MEMEN);
 	command = pci_read_config(dev, PCIR_COMMAND, 4);
 
 #ifdef DC_USEIOSPACE
diff --git a/sys/pci/if_pcn.c b/sys/pci/if_pcn.c
index 395a5ff..eced632 100644
--- a/sys/pci/if_pcn.c
+++ b/sys/pci/if_pcn.c
@@ -502,38 +502,32 @@ static int pcn_attach(dev)
 	/*
 	 * Handle power management nonsense.
 	 */
-
-	command = pci_read_config(dev, PCN_PCI_CAPID, 4) & 0x000000FF;
-	if (command == 0x01) {
-
-		command = pci_read_config(dev, PCN_PCI_PWRMGMTCTRL, 4);
-		if (command & PCN_PSTATE_MASK) {
-			u_int32_t		iobase, membase, irq;
-
-			/* Save important PCI config data. */
-			iobase = pci_read_config(dev, PCN_PCI_LOIO, 4);
-			membase = pci_read_config(dev, PCN_PCI_LOMEM, 4);
-			irq = pci_read_config(dev, PCN_PCI_INTLINE, 4);
-
-			/* Reset the power state. */
-			printf("pcn%d: chip is in D%d power mode "
-			"-- setting to D0\n", unit, command & PCN_PSTATE_MASK);
-			command &= 0xFFFFFFFC;
-			pci_write_config(dev, PCN_PCI_PWRMGMTCTRL, command, 4);
-
-			/* Restore PCI config data. */
-			pci_write_config(dev, PCN_PCI_LOIO, iobase, 4);
-			pci_write_config(dev, PCN_PCI_LOMEM, membase, 4);
-			pci_write_config(dev, PCN_PCI_INTLINE, irq, 4);
-		}
+	if (pci_get_powerstate(dev) != PCI_POWERSTATE_D0) {
+		u_int32_t		iobase, membase, irq;
+
+		/* Save important PCI config data. */
+		iobase = pci_read_config(dev, PCN_PCI_LOIO, 4);
+		membase = pci_read_config(dev, PCN_PCI_LOMEM, 4);
+		irq = pci_read_config(dev, PCN_PCI_INTLINE, 4);
+
+		/* Reset the power state. */
+		printf("pcn%d: chip is in D%d power mode "
+		    "-- setting to D0\n", unit,
+		    pci_get_powerstate(dev));
+		pci_set_powerstate(dev, PCI_POWERSTATE_D0);
+
+		/* Restore PCI config data. */
+		pci_write_config(dev, PCN_PCI_LOIO, iobase, 4);
+		pci_write_config(dev, PCN_PCI_LOMEM, membase, 4);
+		pci_write_config(dev, PCN_PCI_INTLINE, irq, 4);
 	}
 
 	/*
 	 * Map control/status registers.
 	 */
-	command = pci_read_config(dev, PCIR_COMMAND, 4);
-	command |= (PCIM_CMD_PORTEN|PCIM_CMD_MEMEN|PCIM_CMD_BUSMASTEREN);
-	pci_write_config(dev, PCIR_COMMAND, command, 4);
+	pci_enable_busmaster(dev);
+	pci_enable_io(dev, PCIM_CMD_PORTEN);
+	pci_enable_io(dev, PCIM_CMD_MEMEN);
 	command = pci_read_config(dev, PCIR_COMMAND, 4);
 
 #ifdef PCN_USEIOSPACE
diff --git a/sys/pci/if_rl.c b/sys/pci/if_rl.c
index 100cf5a..90dd737 100644
--- a/sys/pci/if_rl.c
+++ b/sys/pci/if_rl.c
@@ -152,6 +152,8 @@ static struct rl_type rl_devs[] = {
 		"Delta Electronics 8139 10/100BaseTX" },
 	{ ADDTRON_VENDORID, ADDTRON_DEVICEID_8139,
 		"Addtron Technolgy 8139 10/100BaseTX" },
+	{ DLINK_VENDORID, DLINK_DEVICEID_530TXPLUS,
+		"D-Link DFE-530TX+ 10/100BaseTX" },
 	{ 0, 0, NULL }
 };
 
@@ -832,9 +834,9 @@ static int rl_attach(dev)
 	/*
 	 * Map control/status registers.
 	 */
-	command = pci_read_config(dev, PCIR_COMMAND, 4);
-	command |= (PCIM_CMD_PORTEN|PCIM_CMD_MEMEN|PCIM_CMD_BUSMASTEREN);
-	pci_write_config(dev, PCIR_COMMAND, command, 4);
+	pci_enable_busmaster(dev);
+	pci_enable_io(dev, PCIM_CMD_PORTEN);
+	pci_enable_io(dev, PCIM_CMD_MEMEN);
 	command = pci_read_config(dev, PCIR_COMMAND, 4);
 
 #ifdef RL_USEIOSPACE
@@ -925,7 +927,7 @@ static int rl_attach(dev)
 
 	if (rl_did == RT_DEVICEID_8139 || rl_did == ACCTON_DEVICEID_5030 ||
 	    rl_did == DELTA_DEVICEID_8139 || rl_did == ADDTRON_DEVICEID_8139 ||
-	    rl_did == RT_DEVICEID_8138)
+	    rl_did == RT_DEVICEID_8138 || rl_did == DLINK_DEVICEID_530TXPLUS)
 		sc->rl_type = RL_8139;
 	else if (rl_did == RT_DEVICEID_8129)
 		sc->rl_type = RL_8129;
diff --git a/sys/pci/if_rlreg.h b/sys/pci/if_rlreg.h
index 1f3fc88..4e08e16 100644
--- a/sys/pci/if_rlreg.h
+++ b/sys/pci/if_rlreg.h
@@ -440,6 +440,16 @@ struct rl_softc {
 #define ADDTRON_DEVICEID_8139			0x1360
 
 /*
+ * D-Link vendor ID.
+ */
+#define DLINK_VENDORID				0x1186
+
+/*
+ * D-Link DFE-530TX+ device ID
+ */
+#define DLINK_DEVICEID_530TXPLUS		0x1300
+
+/*
  * PCI low memory base and low I/O base register, and
  * other PCI registers.
  */
diff --git a/sys/pci/if_sf.c b/sys/pci/if_sf.c
index 2e1cacf..dd26fca 100644
--- a/sys/pci/if_sf.c
+++ b/sys/pci/if_sf.c
@@ -675,37 +675,32 @@ static int sf_attach(dev)
 	/*
 	 * Handle power management nonsense.
 	 */
-	command = pci_read_config(dev, SF_PCI_CAPID, 4) & 0x000000FF;
-	if (command == 0x01) {
-
-		command = pci_read_config(dev, SF_PCI_PWRMGMTCTRL, 4);
-		if (command & SF_PSTATE_MASK) {
-			u_int32_t		iobase, membase, irq;
-
-			/* Save important PCI config data. */
-			iobase = pci_read_config(dev, SF_PCI_LOIO, 4);
-			membase = pci_read_config(dev, SF_PCI_LOMEM, 4);
-			irq = pci_read_config(dev, SF_PCI_INTLINE, 4);
-
-			/* Reset the power state. */
-			printf("sf%d: chip is in D%d power mode "
-			"-- setting to D0\n", unit, command & SF_PSTATE_MASK);
-			command &= 0xFFFFFFFC;
-			pci_write_config(dev, SF_PCI_PWRMGMTCTRL, command, 4);
-
-			/* Restore PCI config data. */
-			pci_write_config(dev, SF_PCI_LOIO, iobase, 4);
-			pci_write_config(dev, SF_PCI_LOMEM, membase, 4);
-			pci_write_config(dev, SF_PCI_INTLINE, irq, 4);
-		}
+	if (pci_get_powerstate(dev) != PCI_POWERSTATE_D0) {
+		u_int32_t		iobase, membase, irq;
+
+		/* Save important PCI config data. */
+		iobase = pci_read_config(dev, SF_PCI_LOIO, 4);
+		membase = pci_read_config(dev, SF_PCI_LOMEM, 4);
+		irq = pci_read_config(dev, SF_PCI_INTLINE, 4);
+
+		/* Reset the power state. */
+		printf("sf%d: chip is in D%d power mode "
+		    "-- setting to D0\n", unit,
+		    pci_get_powerstate(dev));
+		pci_set_powerstate(dev, PCI_POWERSTATE_D0);
+
+		/* Restore PCI config data. */
+		pci_write_config(dev, SF_PCI_LOIO, iobase, 4);
+		pci_write_config(dev, SF_PCI_LOMEM, membase, 4);
+		pci_write_config(dev, SF_PCI_INTLINE, irq, 4);
 	}
 
 	/*
 	 * Map control/status registers.
 	 */
-	command = pci_read_config(dev, PCIR_COMMAND, 4);
-	command |= (PCIM_CMD_PORTEN|PCIM_CMD_MEMEN|PCIM_CMD_BUSMASTEREN);
-	pci_write_config(dev, PCIR_COMMAND, command, 4);
+	pci_enable_busmaster(dev);
+	pci_enable_io(dev, PCIM_CMD_PORTEN);
+	pci_enable_io(dev, PCIM_CMD_MEMEN);
 	command = pci_read_config(dev, PCIR_COMMAND, 4);
 
 #ifdef SF_USEIOSPACE
diff --git a/sys/pci/if_sis.c b/sys/pci/if_sis.c
index b5b96ce..8394674 100644
--- a/sys/pci/if_sis.c
+++ b/sys/pci/if_sis.c
@@ -666,6 +666,16 @@ static void sis_reset(sc)
 
 	/* Wait a little while for the chip to get its brains in order. */
 	DELAY(1000);
+
+	/*
+	 * If this is a NetSemi chip, make sure to clear
+	 * PME mode.
+	 */
+	if (sc->sis_type == SIS_TYPE_83815) {
+		CSR_WRITE_4(sc, NS_CLKRUN, NS_CLKRUN_PMESTS);
+		CSR_WRITE_4(sc, NS_CLKRUN, 0);
+	}
+
         return;
 }
 
@@ -722,38 +732,32 @@ static int sis_attach(dev)
 	/*
 	 * Handle power management nonsense.
 	 */
-
-	command = pci_read_config(dev, SIS_PCI_CAPID, 4) & 0x000000FF;
-	if (command == 0x01) {
-
-		command = pci_read_config(dev, SIS_PCI_PWRMGMTCTRL, 4);
-		if (command & SIS_PSTATE_MASK) {
-			u_int32_t		iobase, membase, irq;
-
-			/* Save important PCI config data. */
-			iobase = pci_read_config(dev, SIS_PCI_LOIO, 4);
-			membase = pci_read_config(dev, SIS_PCI_LOMEM, 4);
-			irq = pci_read_config(dev, SIS_PCI_INTLINE, 4);
-
-			/* Reset the power state. */
-			printf("sis%d: chip is in D%d power mode "
-			"-- setting to D0\n", unit, command & SIS_PSTATE_MASK);
-			command &= 0xFFFFFFFC;
-			pci_write_config(dev, SIS_PCI_PWRMGMTCTRL, command, 4);
-
-			/* Restore PCI config data. */
-			pci_write_config(dev, SIS_PCI_LOIO, iobase, 4);
-			pci_write_config(dev, SIS_PCI_LOMEM, membase, 4);
-			pci_write_config(dev, SIS_PCI_INTLINE, irq, 4);
-		}
+	if (pci_get_powerstate(dev) != PCI_POWERSTATE_D0) {
+		u_int32_t		iobase, membase, irq;
+
+		/* Save important PCI config data. */
+		iobase = pci_read_config(dev, SIS_PCI_LOIO, 4);
+		membase = pci_read_config(dev, SIS_PCI_LOMEM, 4);
+		irq = pci_read_config(dev, SIS_PCI_INTLINE, 4);
+
+		/* Reset the power state. */
+		printf("sis%d: chip is in D%d power mode "
+		    "-- setting to D0\n", unit,
+		    pci_get_powerstate(dev));
+		pci_set_powerstate(dev, PCI_POWERSTATE_D0);
+
+		/* Restore PCI config data. */
+		pci_write_config(dev, SIS_PCI_LOIO, iobase, 4);
+		pci_write_config(dev, SIS_PCI_LOMEM, membase, 4);
+		pci_write_config(dev, SIS_PCI_INTLINE, irq, 4);
 	}
 
 	/*
 	 * Map control/status registers.
 	 */
-	command = pci_read_config(dev, PCIR_COMMAND, 4);
-	command |= (PCIM_CMD_PORTEN|PCIM_CMD_MEMEN|PCIM_CMD_BUSMASTEREN);
-	pci_write_config(dev, PCIR_COMMAND, command, 4);
+	pci_enable_busmaster(dev);
+	pci_enable_io(dev, PCIM_CMD_PORTEN);
+	pci_enable_io(dev, PCIM_CMD_MEMEN);
 	command = pci_read_config(dev, PCIR_COMMAND, 4);
 
 #ifdef SIS_USEIOSPACE
diff --git a/sys/pci/if_sisreg.h b/sys/pci/if_sisreg.h
index 9e1c44c..10cc02f 100644
--- a/sys/pci/if_sisreg.h
+++ b/sys/pci/if_sisreg.h
@@ -75,6 +75,7 @@
 #define SIS_GPIO		0xB8
 
 /* NS DP83815 registers */
+#define NS_CLKRUN		0x3C
 #define NS_BMCR			0x80
 #define NS_BMSR			0x84
 #define NS_PHYIDR1		0x88
@@ -92,6 +93,10 @@
 #define NS_PHY_SDCFG		0xF8
 #define NS_PHY_TDATA		0xFC
 
+#define NS_CLKRUN_PMESTS	0x00008000
+#define NS_CLKRUN_PMEENB	0x00000100
+#define NS_CLNRUN_CLKRUN_ENB	0x00000001
+
 #define SIS_CSR_TX_ENABLE	0x00000001
 #define SIS_CSR_TX_DISABLE	0x00000002
 #define SIS_CSR_RX_ENABLE	0x00000004
diff --git a/sys/pci/if_sk.c b/sys/pci/if_sk.c
index 960b98b..4b5e7f6 100644
--- a/sys/pci/if_sk.c
+++ b/sys/pci/if_sk.c
@@ -1192,37 +1192,32 @@ static int sk_attach(dev)
 	/*
 	 * Handle power management nonsense.
 	 */
-	command = pci_read_config(dev, SK_PCI_CAPID, 4) & 0x000000FF;
-	if (command == 0x01) {
-
-		command = pci_read_config(dev, SK_PCI_PWRMGMTCTRL, 4);
-		if (command & SK_PSTATE_MASK) {
-			u_int32_t		iobase, membase, irq;
-
-			/* Save important PCI config data. */
-			iobase = pci_read_config(dev, SK_PCI_LOIO, 4);
-			membase = pci_read_config(dev, SK_PCI_LOMEM, 4);
-			irq = pci_read_config(dev, SK_PCI_INTLINE, 4);
-
-			/* Reset the power state. */
-			printf("skc%d: chip is in D%d power mode "
-			"-- setting to D0\n", unit, command & SK_PSTATE_MASK);
-			command &= 0xFFFFFFFC;
-			pci_write_config(dev, SK_PCI_PWRMGMTCTRL, command, 4);
-
-			/* Restore PCI config data. */
-			pci_write_config(dev, SK_PCI_LOIO, iobase, 4);
-			pci_write_config(dev, SK_PCI_LOMEM, membase, 4);
-			pci_write_config(dev, SK_PCI_INTLINE, irq, 4);
-		}
+	if (pci_get_powerstate(dev) != PCI_POWERSTATE_D0) {
+		u_int32_t		iobase, membase, irq;
+
+		/* Save important PCI config data. */
+		iobase = pci_read_config(dev, SK_PCI_LOIO, 4);
+		membase = pci_read_config(dev, SK_PCI_LOMEM, 4);
+		irq = pci_read_config(dev, SK_PCI_INTLINE, 4);
+
+		/* Reset the power state. */
+		printf("skc%d: chip is in D%d power mode "
+		    "-- setting to D0\n", unit,
+		    pci_get_powerstate(dev));
+		pci_set_powerstate(dev, PCI_POWERSTATE_D0);
+
+		/* Restore PCI config data. */
+		pci_write_config(dev, SK_PCI_LOIO, iobase, 4);
+		pci_write_config(dev, SK_PCI_LOMEM, membase, 4);
+		pci_write_config(dev, SK_PCI_INTLINE, irq, 4);
 	}
 
 	/*
 	 * Map control/status registers.
 	 */
-	command = pci_read_config(dev, PCIR_COMMAND, 4);
-	command |= (PCIM_CMD_PORTEN|PCIM_CMD_MEMEN|PCIM_CMD_BUSMASTEREN);
-	pci_write_config(dev, PCIR_COMMAND, command, 4);
+	pci_enable_busmaster(dev);
+	pci_enable_io(dev, PCIM_CMD_PORTEN);
+	pci_enable_io(dev, PCIM_CMD_MEMEN);
 	command = pci_read_config(dev, PCIR_COMMAND, 4);
 
 #ifdef SK_USEIOSPACE
diff --git a/sys/pci/if_ste.c b/sys/pci/if_ste.c
index ef7b2f6..50de250 100644
--- a/sys/pci/if_ste.c
+++ b/sys/pci/if_ste.c
@@ -921,37 +921,32 @@ static int ste_attach(dev)
 	/*
 	 * Handle power management nonsense.
 	 */
-	command = pci_read_config(dev, STE_PCI_CAPID, 4) & 0x000000FF;
-	if (command == 0x01) {
-
-		command = pci_read_config(dev, STE_PCI_PWRMGMTCTRL, 4);
-		if (command & STE_PSTATE_MASK) {
-			u_int32_t		iobase, membase, irq;
-
-			/* Save important PCI config data. */
-			iobase = pci_read_config(dev, STE_PCI_LOIO, 4);
-			membase = pci_read_config(dev, STE_PCI_LOMEM, 4);
-			irq = pci_read_config(dev, STE_PCI_INTLINE, 4);
-
-			/* Reset the power state. */
-			printf("ste%d: chip is in D%d power mode "
-			"-- setting to D0\n", unit, command & STE_PSTATE_MASK);
-			command &= 0xFFFFFFFC;
-			pci_write_config(dev, STE_PCI_PWRMGMTCTRL, command, 4);
-
-			/* Restore PCI config data. */
-			pci_write_config(dev, STE_PCI_LOIO, iobase, 4);
-			pci_write_config(dev, STE_PCI_LOMEM, membase, 4);
-			pci_write_config(dev, STE_PCI_INTLINE, irq, 4);
-		}
+	if (pci_get_powerstate(dev) != PCI_POWERSTATE_D0) {
+		u_int32_t		iobase, membase, irq;
+
+		/* Save important PCI config data. */
+		iobase = pci_read_config(dev, STE_PCI_LOIO, 4);
+		membase = pci_read_config(dev, STE_PCI_LOMEM, 4);
+		irq = pci_read_config(dev, STE_PCI_INTLINE, 4);
+
+		/* Reset the power state. */
+		printf("ste%d: chip is in D%d power mode "
+		    "-- setting to D0\n", unit,
+		    pci_get_powerstate(dev));
+		pci_set_powerstate(dev, PCI_POWERSTATE_D0);
+
+		/* Restore PCI config data. */
+		pci_write_config(dev, STE_PCI_LOIO, iobase, 4);
+		pci_write_config(dev, STE_PCI_LOMEM, membase, 4);
+		pci_write_config(dev, STE_PCI_INTLINE, irq, 4);
 	}
 
 	/*
 	 * Map control/status registers.
 	 */
-	command = pci_read_config(dev, PCIR_COMMAND, 4);
-	command |= (PCIM_CMD_PORTEN|PCIM_CMD_MEMEN|PCIM_CMD_BUSMASTEREN);
-	pci_write_config(dev, PCIR_COMMAND, command, 4);
+	pci_enable_busmaster(dev);
+	pci_enable_io(dev, PCIM_CMD_PORTEN);
+	pci_enable_io(dev, PCIM_CMD_MEMEN);
 	command = pci_read_config(dev, PCIR_COMMAND, 4);
 
 #ifdef STE_USEIOSPACE
diff --git a/sys/pci/if_ti.c b/sys/pci/if_ti.c
index 818d6a2..a25c2f2 100644
--- a/sys/pci/if_ti.c
+++ b/sys/pci/if_ti.c
@@ -1481,9 +1481,8 @@ static int ti_attach(dev)
 	/*
 	 * Map control/status registers.
 	 */
-	command = pci_read_config(dev, PCIR_COMMAND, 4);
-	command |= (PCIM_CMD_MEMEN|PCIM_CMD_BUSMASTEREN);
-	pci_write_config(dev, PCIR_COMMAND, command, 4);
+	pci_enable_busmaster(dev);
+	pci_enable_io(dev, PCIM_CMD_MEMEN);
 	command = pci_read_config(dev, PCIR_COMMAND, 4);
 
 	if (!(command & PCIM_CMD_MEMEN)) {
diff --git a/sys/pci/if_tl.c b/sys/pci/if_tl.c
index 718498a..727f8d1 100644
--- a/sys/pci/if_tl.c
+++ b/sys/pci/if_tl.c
@@ -1130,9 +1130,9 @@ static int tl_attach(dev)
 	/*
 	 * Map control/status registers.
 	 */
-	command = pci_read_config(dev, PCIR_COMMAND, 4);
-	command |= (PCIM_CMD_PORTEN|PCIM_CMD_MEMEN|PCIM_CMD_BUSMASTEREN);
-	pci_write_config(dev, PCIR_COMMAND, command, 4);
+	pci_enable_busmaster(dev);
+	pci_enable_io(dev, PCIM_CMD_PORTEN);
+	pci_enable_io(dev, PCIM_CMD_MEMEN);
 	command = pci_read_config(dev, PCIR_COMMAND, 4);
 
 #ifdef TL_USEIOSPACE
diff --git a/sys/pci/if_vr.c b/sys/pci/if_vr.c
index 0f44a1d..9c6591b 100644
--- a/sys/pci/if_vr.c
+++ b/sys/pci/if_vr.c
@@ -648,38 +648,32 @@ static int vr_attach(dev)
 	/*
 	 * Handle power management nonsense.
 	 */
+	if (pci_get_powerstate(dev) != PCI_POWERSTATE_D0) {
+		u_int32_t		iobase, membase, irq;
 
-	command = pci_read_config(dev, VR_PCI_CAPID, 4) & 0x000000FF;
-	if (command == 0x01) {
+		/* Save important PCI config data. */
+		iobase = pci_read_config(dev, VR_PCI_LOIO, 4);
+		membase = pci_read_config(dev, VR_PCI_LOMEM, 4);
+		irq = pci_read_config(dev, VR_PCI_INTLINE, 4);
 
-		command = pci_read_config(dev, VR_PCI_PWRMGMTCTRL, 4);
-		if (command & VR_PSTATE_MASK) {
-			u_int32_t		iobase, membase, irq;
-
-			/* Save important PCI config data. */
-			iobase = pci_read_config(dev, VR_PCI_LOIO, 4);
-			membase = pci_read_config(dev, VR_PCI_LOMEM, 4);
-			irq = pci_read_config(dev, VR_PCI_INTLINE, 4);
-
-			/* Reset the power state. */
-			printf("vr%d: chip is in D%d power mode "
-			"-- setting to D0\n", unit, command & VR_PSTATE_MASK);
-			command &= 0xFFFFFFFC;
-			pci_write_config(dev, VR_PCI_PWRMGMTCTRL, command, 4);
+		/* Reset the power state. */
+		printf("vr%d: chip is in D%d power mode "
+		    "-- setting to D0\n", unit,
+		    pci_get_powerstate(dev));
+		pci_set_powerstate(dev, PCI_POWERSTATE_D0);
 
 			/* Restore PCI config data. */
-			pci_write_config(dev, VR_PCI_LOIO, iobase, 4);
-			pci_write_config(dev, VR_PCI_LOMEM, membase, 4);
-			pci_write_config(dev, VR_PCI_INTLINE, irq, 4);
-		}
+		pci_write_config(dev, VR_PCI_LOIO, iobase, 4);
+		pci_write_config(dev, VR_PCI_LOMEM, membase, 4);
+		pci_write_config(dev, VR_PCI_INTLINE, irq, 4);
 	}
 
 	/*
 	 * Map control/status registers.
 	 */
-	command = pci_read_config(dev, PCIR_COMMAND, 4);
-	command |= (PCIM_CMD_PORTEN|PCIM_CMD_MEMEN|PCIM_CMD_BUSMASTEREN);
-	pci_write_config(dev, PCIR_COMMAND, command, 4);
+	pci_enable_busmaster(dev);
+	pci_enable_io(dev, PCIM_CMD_PORTEN);
+	pci_enable_io(dev, PCIM_CMD_MEMEN);
 	command = pci_read_config(dev, PCIR_COMMAND, 4);
 
 #ifdef VR_USEIOSPACE
diff --git a/sys/pci/if_wb.c b/sys/pci/if_wb.c
index f79be10..50de1fd 100644
--- a/sys/pci/if_wb.c
+++ b/sys/pci/if_wb.c
@@ -822,37 +822,32 @@ static int wb_attach(dev)
 	 * Handle power management nonsense.
 	 */
 
-	command = pci_read_config(dev, WB_PCI_CAPID, 4) & 0x000000FF;
-	if (command == 0x01) {
-
-		command = pci_read_config(dev, WB_PCI_PWRMGMTCTRL, 4);
-		if (command & WB_PSTATE_MASK) {
-			u_int32_t		iobase, membase, irq;
-
-			/* Save important PCI config data. */
-			iobase = pci_read_config(dev, WB_PCI_LOIO, 4);
-			membase = pci_read_config(dev, WB_PCI_LOMEM, 4);
-			irq = pci_read_config(dev, WB_PCI_INTLINE, 4);
-
-			/* Reset the power state. */
-			printf("wb%d: chip is in D%d power mode "
-			"-- setting to D0\n", unit, command & WB_PSTATE_MASK);
-			command &= 0xFFFFFFFC;
-			pci_write_config(dev, WB_PCI_PWRMGMTCTRL, command, 4);
-
-			/* Restore PCI config data. */
-			pci_write_config(dev, WB_PCI_LOIO, iobase, 4);
-			pci_write_config(dev, WB_PCI_LOMEM, membase, 4);
-			pci_write_config(dev, WB_PCI_INTLINE, irq, 4);
-		}
+	if (pci_get_powerstate(dev) != PCI_POWERSTATE_D0) {
+		u_int32_t		iobase, membase, irq;
+
+		/* Save important PCI config data. */
+		iobase = pci_read_config(dev, WB_PCI_LOIO, 4);
+		membase = pci_read_config(dev, WB_PCI_LOMEM, 4);
+		irq = pci_read_config(dev, WB_PCI_INTLINE, 4);
+
+		/* Reset the power state. */
+		printf("wb%d: chip is in D%d power mode "
+		    "-- setting to D0\n", unit,
+		    pci_get_powerstate(dev));
+		pci_set_powerstate(dev, PCI_POWERSTATE_D0);
+
+		/* Restore PCI config data. */
+		pci_write_config(dev, WB_PCI_LOIO, iobase, 4);
+		pci_write_config(dev, WB_PCI_LOMEM, membase, 4);
+		pci_write_config(dev, WB_PCI_INTLINE, irq, 4);
 	}
 
 	/*
 	 * Map control/status registers.
 	 */
-	command = pci_read_config(dev, PCIR_COMMAND, 4);
-	command |= (PCIM_CMD_PORTEN|PCIM_CMD_MEMEN|PCIM_CMD_BUSMASTEREN);
-	pci_write_config(dev, PCIR_COMMAND, command, 4);
+	pci_enable_busmaster(dev);
+	pci_enable_io(dev, PCIM_CMD_PORTEN);
+	pci_enable_io(dev, PCIM_CMD_MEMEN);
 	command = pci_read_config(dev, PCIR_COMMAND, 4);
 
 #ifdef WB_USEIOSPACE
diff --git a/sys/pci/if_xl.c b/sys/pci/if_xl.c
index 0fcaf8b..ff990ec 100644
--- a/sys/pci/if_xl.c
+++ b/sys/pci/if_xl.c
@@ -1304,9 +1304,9 @@ static int xl_attach(dev)
 	/*
 	 * Map control/status registers.
 	 */
-	command = pci_read_config(dev, PCIR_COMMAND, 4);
-	command |= (PCIM_CMD_PORTEN|PCIM_CMD_MEMEN|PCIM_CMD_BUSMASTEREN);
-	pci_write_config(dev, PCIR_COMMAND, command, 4);
+	pci_enable_busmaster(dev);
+	pci_enable_io(dev, PCIM_CMD_PORTEN);
+	pci_enable_io(dev, PCIM_CMD_MEMEN);
 	command = pci_read_config(dev, PCIR_COMMAND, 4);
 
 #ifdef XL_USEIOSPACE