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authorjkim <jkim@FreeBSD.org>2007-01-05 20:06:40 +0000
committerjkim <jkim@FreeBSD.org>2007-01-05 20:06:40 +0000
commit45243cfb24d4bbffa5f68feeaa19e0e8cb327a53 (patch)
tree567b269f6a3abd71effaea7db68bc0d1cf082a09 /sys/pci
parent256d3cdbaf7ae58daa236a7354b03d5b94182a94 (diff)
downloadFreeBSD-src-45243cfb24d4bbffa5f68feeaa19e0e8cb327a53.zip
FreeBSD-src-45243cfb24d4bbffa5f68feeaa19e0e8cb327a53.tar.gz
Fix style(9).
Diffstat (limited to 'sys/pci')
-rw-r--r--sys/pci/agp_intel.c113
1 files changed, 52 insertions, 61 deletions
diff --git a/sys/pci/agp_intel.c b/sys/pci/agp_intel.c
index efb809b..2166b2f 100644
--- a/sys/pci/agp_intel.c
+++ b/sys/pci/agp_intel.c
@@ -50,8 +50,6 @@ __FBSDID("$FreeBSD$");
#define MAX_APSIZE 0x3f /* 256 MB */
-static void agp_intel_commit_gatt(device_t dev);
-
struct agp_intel_softc {
struct agp_softc agp;
u_int32_t initial_aperture; /* aperture size at startup */
@@ -64,70 +62,53 @@ agp_intel_match(device_t dev)
{
if (pci_get_class(dev) != PCIC_BRIDGE
|| pci_get_subclass(dev) != PCIS_BRIDGE_HOST)
- return NULL;
+ return (NULL);
if (agp_find_caps(dev) == 0)
- return NULL;
+ return (NULL);
switch (pci_get_devid(dev)) {
/* Intel -- vendor 0x8086 */
case 0x71808086:
return ("Intel 82443LX (440 LX) host to PCI bridge");
-
case 0x71908086:
return ("Intel 82443BX (440 BX) host to PCI bridge");
-
case 0x71a08086:
return ("Intel 82443GX host to PCI bridge");
-
case 0x71a18086:
return ("Intel 82443GX host to AGP bridge");
-
case 0x11308086:
return ("Intel 82815 (i815 GMCH) host to PCI bridge");
-
case 0x25008086:
case 0x25018086:
return ("Intel 82820 host to AGP bridge");
-
case 0x35758086:
return ("Intel 82830 host to AGP bridge");
-
case 0x1a218086:
return ("Intel 82840 host to AGP bridge");
-
case 0x1a308086:
return ("Intel 82845 host to AGP bridge");
-
case 0x25308086:
return ("Intel 82850 host to AGP bridge");
-
case 0x33408086:
return ("Intel 82855 host to AGP bridge");
-
case 0x25318086:
return ("Intel 82860 host to AGP bridge");
-
case 0x25708086:
return ("Intel 82865 host to AGP bridge");
-
case 0x255d8086:
return ("Intel E7205 host to AGP bridge");
-
case 0x25508086:
return ("Intel E7505 host to AGP bridge");
-
case 0x25788086:
return ("Intel 82875P host to AGP bridge");
-
case 0x25608086:
return ("Intel 82845G host to AGP bridge");
-
case 0x35808086:
return ("Intel 82855GM host to AGP bridge");
};
- return NULL;
+ return (NULL);
}
static int
@@ -140,21 +121,24 @@ agp_intel_probe(device_t dev)
desc = agp_intel_match(dev);
if (desc) {
device_set_desc(dev, desc);
- return BUS_PROBE_DEFAULT;
+ return (BUS_PROBE_DEFAULT);
}
- return ENXIO;
+ return (ENXIO);
}
-static void agp_intel_commit_gatt(device_t dev)
+static void
+agp_intel_commit_gatt(device_t dev)
{
- struct agp_intel_softc *sc = device_get_softc(dev);
- struct agp_gatt *gatt = sc->gatt;
- u_int32_t type = pci_get_devid(dev);
+ struct agp_intel_softc *sc;
+ u_int32_t type;
u_int32_t value;
+ sc = device_get_softc(dev);
+ type = pci_get_devid(dev);
+
/* Install the gatt. */
- pci_write_config(dev, AGP_INTEL_ATTBASE, gatt->ag_physical, 4);
+ pci_write_config(dev, AGP_INTEL_ATTBASE, sc->gatt->ag_physical, 4);
/* Enable the GLTB and setup the control register. */
switch (type) {
@@ -182,14 +166,12 @@ static void agp_intel_commit_gatt(device_t dev)
(pci_read_config(dev, AGP_INTEL_MCHCFG, 2)
| (1 << 9)), 2);
break;
-
case 0x25008086: /* i820 */
case 0x25018086: /* i820 */
pci_write_config(dev, AGP_INTEL_I820_RDCR,
(pci_read_config(dev, AGP_INTEL_I820_RDCR, 1)
| (1 << 1)), 1);
break;
-
case 0x1a308086: /* i845 */
case 0x33408086: /* i855 */
case 0x35808086: /* i855GM */
@@ -202,7 +184,6 @@ static void agp_intel_commit_gatt(device_t dev)
(pci_read_config(dev, AGP_INTEL_I845_MCHCFG, 1)
| (1 << 1)), 1);
break;
-
default: /* Intel Generic (maybe) */
pci_write_config(dev, AGP_INTEL_NBXCFG,
(pci_read_config(dev, AGP_INTEL_NBXCFG, 4)
@@ -213,7 +194,6 @@ static void agp_intel_commit_gatt(device_t dev)
case 0x1a218086: /* i840 */
pci_write_config(dev, AGP_INTEL_I8XX_ERRSTS, 0xc000, 2);
break;
-
case 0x25008086: /* i820 */
case 0x25018086: /* i820 */
case 0x1a308086: /* i845 */
@@ -227,7 +207,6 @@ static void agp_intel_commit_gatt(device_t dev)
case 0x25608086: /* i845G */
pci_write_config(dev, AGP_INTEL_I8XX_ERRSTS, 0x00ff, 2);
break;
-
default: /* Intel Generic (maybe) */
pci_write_config(dev, AGP_INTEL_ERRSTS + 1, 7, 1);
}
@@ -236,14 +215,16 @@ static void agp_intel_commit_gatt(device_t dev)
static int
agp_intel_attach(device_t dev)
{
- struct agp_intel_softc *sc = device_get_softc(dev);
+ struct agp_intel_softc *sc;
struct agp_gatt *gatt;
u_int32_t value;
int error;
+ sc = device_get_softc(dev);
+
error = agp_generic_attach(dev);
if (error)
- return error;
+ return (error);
/* Determine maximum supported aperture size. */
value = pci_read_config(dev, AGP_INTEL_APSIZE, 1);
@@ -264,28 +245,29 @@ agp_intel_attach(device_t dev)
*/
if (AGP_SET_APERTURE(dev, AGP_GET_APERTURE(dev) / 2)) {
agp_generic_detach(dev);
- return ENOMEM;
+ return (ENOMEM);
}
}
sc->gatt = gatt;
-
+
agp_intel_commit_gatt(dev);
-
- return 0;
+
+ return (0);
}
static int
agp_intel_detach(device_t dev)
{
- struct agp_intel_softc *sc = device_get_softc(dev);
- u_int32_t type = pci_get_devid(dev);
+ struct agp_intel_softc *sc;
int error;
+ sc = device_get_softc(dev);
+
error = agp_generic_detach(dev);
if (error)
- return error;
+ return (error);
- switch (type) {
+ switch (pci_get_devid(dev)) {
case 0x1a218086: /* i840 */
case 0x25308086: /* i850 */
case 0x25318086: /* i860 */
@@ -295,7 +277,7 @@ agp_intel_detach(device_t dev)
pci_write_config(dev, AGP_INTEL_MCHCFG,
(pci_read_config(dev, AGP_INTEL_MCHCFG, 2)
& ~(1 << 9)), 2);
-
+ /* FALLTHRU */
case 0x25008086: /* i820 */
case 0x25018086: /* i820 */
printf("%s: set RDCR to %x\n", __func__, (unsigned)
@@ -304,7 +286,7 @@ agp_intel_detach(device_t dev)
pci_write_config(dev, AGP_INTEL_I820_RDCR,
(pci_read_config(dev, AGP_INTEL_I820_RDCR, 1)
& ~(1 << 1)), 1);
-
+ /* FALLTHRU */
case 0x1a308086: /* i845 */
case 0x25608086: /* i845G */
case 0x33408086: /* i855 */
@@ -319,7 +301,7 @@ agp_intel_detach(device_t dev)
pci_write_config(dev, AGP_INTEL_MCHCFG,
(pci_read_config(dev, AGP_INTEL_I845_MCHCFG, 1)
& ~(1 << 1)), 1);
-
+ /* FALLTHRU */
default: /* Intel Generic (maybe) */
printf("%s: set NBXCFG to %x\n", __func__,
(pci_read_config(dev, AGP_INTEL_NBXCFG, 4)
@@ -332,21 +314,24 @@ agp_intel_detach(device_t dev)
AGP_SET_APERTURE(dev, sc->initial_aperture);
agp_free_gatt(sc->gatt);
- return 0;
+ return (0);
}
-static int agp_intel_resume(device_t dev)
+static int
+agp_intel_resume(device_t dev)
{
agp_intel_commit_gatt(dev);
- return bus_generic_resume(dev);
+ return (bus_generic_resume(dev));
}
static u_int32_t
agp_intel_get_aperture(device_t dev)
{
- struct agp_intel_softc *sc = device_get_softc(dev);
+ struct agp_intel_softc *sc;
u_int32_t apsize;
+ sc = device_get_softc(dev);
+
apsize = pci_read_config(dev, AGP_INTEL_APSIZE, 1) & sc->aperture_mask;
/*
@@ -356,15 +341,17 @@ agp_intel_get_aperture(device_t dev)
* field just read forces the corresponding bit in the 27:22
* to be zero. We calculate the aperture size accordingly.
*/
- return (((apsize ^ sc->aperture_mask) << 22) | ((1 << 22) - 1)) + 1;
+ return ((((apsize ^ sc->aperture_mask) << 22) | ((1 << 22) - 1)) + 1);
}
static int
agp_intel_set_aperture(device_t dev, u_int32_t aperture)
{
- struct agp_intel_softc *sc = device_get_softc(dev);
+ struct agp_intel_softc *sc;
u_int32_t apsize;
+ sc = device_get_softc(dev);
+
/*
* Reverse the magic from get_aperture.
*/
@@ -374,35 +361,39 @@ agp_intel_set_aperture(device_t dev, u_int32_t aperture)
* Double check for sanity.
*/
if ((((apsize ^ sc->aperture_mask) << 22) | ((1 << 22) - 1)) + 1 != aperture)
- return EINVAL;
+ return (EINVAL);
pci_write_config(dev, AGP_INTEL_APSIZE, apsize, 1);
- return 0;
+ return (0);
}
static int
agp_intel_bind_page(device_t dev, int offset, vm_offset_t physical)
{
- struct agp_intel_softc *sc = device_get_softc(dev);
+ struct agp_intel_softc *sc;
+
+ sc = device_get_softc(dev);
if (offset < 0 || offset >= (sc->gatt->ag_entries << AGP_PAGE_SHIFT))
- return EINVAL;
+ return (EINVAL);
sc->gatt->ag_virtual[offset >> AGP_PAGE_SHIFT] = physical | 0x17;
- return 0;
+ return (0);
}
static int
agp_intel_unbind_page(device_t dev, int offset)
{
- struct agp_intel_softc *sc = device_get_softc(dev);
+ struct agp_intel_softc *sc;
+
+ sc = device_get_softc(dev);
if (offset < 0 || offset >= (sc->gatt->ag_entries << AGP_PAGE_SHIFT))
- return EINVAL;
+ return (EINVAL);
sc->gatt->ag_virtual[offset >> AGP_PAGE_SHIFT] = 0;
- return 0;
+ return (0);
}
static void
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