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| author | phk <phk@FreeBSD.org> | 2007-04-22 12:55:36 +0000 |
|---|---|---|
| committer | phk <phk@FreeBSD.org> | 2007-04-22 12:55:36 +0000 |
| commit | 1c813951d507e42472de7b0f7d974af566a0a736 (patch) | |
| tree | b1c2a8798f22778344c2e366d8fc210d4ee65d80 /sys/pci/if_vrreg.h | |
| parent | 8374d51a3498fe8105bf32f3be52171bcb3fff66 (diff) | |
| download | FreeBSD-src-1c813951d507e42472de7b0f7d974af566a0a736.zip FreeBSD-src-1c813951d507e42472de7b0f7d974af566a0a736.tar.gz | |
Run if_vr(4) through FlexeLint and clean some of the cobwebs found.
Diffstat (limited to 'sys/pci/if_vrreg.h')
| -rw-r--r-- | sys/pci/if_vrreg.h | 38 |
1 files changed, 0 insertions, 38 deletions
diff --git a/sys/pci/if_vrreg.h b/sys/pci/if_vrreg.h index c022d3a..918de48 100644 --- a/sys/pci/if_vrreg.h +++ b/sys/pci/if_vrreg.h @@ -462,44 +462,6 @@ struct vr_mii_frame { #define VR_FLAG_SCHEDDELAY 2 #define VR_FLAG_DELAYTIMEO 3 -struct vr_softc { - struct ifnet *vr_ifp; /* interface info */ - device_t vr_dev; - struct resource *vr_res; - struct resource *vr_irq; - void *vr_intrhand; - device_t vr_miibus; - struct vr_type *vr_info; /* Rhine adapter info */ - u_int8_t vr_type; - u_int8_t vr_revid; /* Rhine chip revision */ - u_int8_t vr_flags; /* See VR_F_* below */ - struct vr_list_data *vr_ldata; - struct vr_chain_data vr_cdata; - struct callout vr_stat_callout; - struct mtx vr_mtx; - int suspended; /* if 1, sleeping/detaching */ - int vr_quirks; -#ifdef DEVICE_POLLING - int rxcycles; -#endif -}; - -#define VR_F_RESTART 0x01 /* Restart unit on next tick */ - -#define VR_LOCK(_sc) mtx_lock(&(_sc)->vr_mtx) -#define VR_UNLOCK(_sc) mtx_unlock(&(_sc)->vr_mtx) -#define VR_LOCK_ASSERT(_sc) mtx_assert(&(_sc)->vr_mtx, MA_OWNED) - -/* - * register space access macros - */ -#define CSR_WRITE_4(sc, reg, val) bus_write_4(sc->vr_res, reg, val) -#define CSR_WRITE_2(sc, reg, val) bus_write_2(sc->vr_res, reg, val) -#define CSR_WRITE_1(sc, reg, val) bus_write_1(sc->vr_res, reg, val) - -#define CSR_READ_4(sc, reg) bus_read_4(sc->vr_res, reg) -#define CSR_READ_2(sc, reg) bus_read_2(sc->vr_res, reg) -#define CSR_READ_1(sc, reg) bus_read_1(sc->vr_res, reg) #define VR_TIMEOUT 1000 #define ETHER_ALIGN 2 |
