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authorwpaul <wpaul@FreeBSD.org>2003-09-11 03:53:46 +0000
committerwpaul <wpaul@FreeBSD.org>2003-09-11 03:53:46 +0000
commit99df7d00b68527fa99cdc340c3f0dfb64c52cbb8 (patch)
treec608e05afba48f38cfd6da674b83b964485513c4 /sys/pci/if_rlreg.h
parent507c61e2567c01f86e8bea87a37b173318779fb4 (diff)
downloadFreeBSD-src-99df7d00b68527fa99cdc340c3f0dfb64c52cbb8.zip
FreeBSD-src-99df7d00b68527fa99cdc340c3f0dfb64c52cbb8.tar.gz
Add a PHY driver to support the built-in gigE PHY in the 8169S/8110S
ethernet chips. This driver is pretty simple, however it contains special DSP initialization code which is needed in order to get the chip to negotiate a gigE link. (This special initialization may not be needed in subsequent chip revs.) Also: - Fix typo in if_rlreg.h (RL_GMEDIASTAT_1000MPS -> RL_GMEDIASTAT_1000MBPS) - Deal with shared interrupts in re_intr(): if interface isn't up, return. - Fix another bug in re_gmii_writereg() (properly apply data field mask) - Allow PHY driver to read the RL_GMEDIASTAT register via the re_gmii_readreg() register (this is register needed to determine real time link/media status).
Diffstat (limited to 'sys/pci/if_rlreg.h')
-rw-r--r--sys/pci/if_rlreg.h2
1 files changed, 1 insertions, 1 deletions
diff --git a/sys/pci/if_rlreg.h b/sys/pci/if_rlreg.h
index e5103f8..32edf6f 100644
--- a/sys/pci/if_rlreg.h
+++ b/sys/pci/if_rlreg.h
@@ -381,7 +381,7 @@
#define RL_GMEDIASTAT_LINK 0x02 /* link up */
#define RL_GMEDIASTAT_10MBPS 0x04 /* 10mps link */
#define RL_GMEDIASTAT_100MBPS 0x08 /* 100mbps link */
-#define RL_GMEDIASTAT_1000MPS 0x10 /* gigE link */
+#define RL_GMEDIASTAT_1000MBPS 0x10 /* gigE link */
#define RL_GMEDIASTAT_RXFLOW 0x20 /* RX flow control on */
#define RL_GMEDIASTAT_TXFLOW 0x40 /* TX flow control on */
#define RL_GMEDIASTAT_TBI 0x80 /* TBI enabled */
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