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authorwpaul <wpaul@FreeBSD.org>2003-06-29 17:33:33 +0000
committerwpaul <wpaul@FreeBSD.org>2003-06-29 17:33:33 +0000
commitaccf54d2fd6d971fc3cf6cc35ff5866b1275597e (patch)
treea5fd0f51144712b2367f6c2510be118deb10793c /sys/pci/if_rl.c
parentd8d789fb8be433ed280d52ec5b13ae301abc922a (diff)
downloadFreeBSD-src-accf54d2fd6d971fc3cf6cc35ff5866b1275597e.zip
FreeBSD-src-accf54d2fd6d971fc3cf6cc35ff5866b1275597e.tar.gz
In order to set the MAC address on RealTek NICs, you must flip WRITECFG
bit in the EEPROM mode register on. Also, the address must be written in two 32-bit register accesses instead of 6 8-bit accesses. Tested with my 8139B cardbus NIC. PR: kern/35900 Submitted by: Mark Kettenis <kettenis@chello.nl>
Diffstat (limited to 'sys/pci/if_rl.c')
-rw-r--r--sys/pci/if_rl.c14
1 files changed, 9 insertions, 5 deletions
diff --git a/sys/pci/if_rl.c b/sys/pci/if_rl.c
index 836c617..861eb51 100644
--- a/sys/pci/if_rl.c
+++ b/sys/pci/if_rl.c
@@ -1597,7 +1597,6 @@ rl_init(xsc)
struct rl_softc *sc = xsc;
struct ifnet *ifp = &sc->arpcom.ac_if;
struct mii_data *mii;
- int i;
u_int32_t rxcfg = 0;
RL_LOCK(sc);
@@ -1608,10 +1607,15 @@ rl_init(xsc)
*/
rl_stop(sc);
- /* Init our MAC address */
- for (i = 0; i < ETHER_ADDR_LEN; i++) {
- CSR_WRITE_1(sc, RL_IDR0 + i, sc->arpcom.ac_enaddr[i]);
- }
+ /*
+ * Init our MAC address. Even though the chipset
+ * documentation doesn't mention it, we need to enter "Config
+ * register write enable" mode to modify the ID registers.
+ */
+ CSR_WRITE_1(sc, RL_EECMD, RL_EEMODE_WRITECFG);
+ CSR_WRITE_4(sc, RL_IDR0, *(u_int32_t *)(&sc->arpcom.ac_enaddr[0]));
+ CSR_WRITE_4(sc, RL_IDR4, *(u_int32_t *)(&sc->arpcom.ac_enaddr[4]));
+ CSR_WRITE_1(sc, RL_EECMD, RL_EEMODE_OFF);
/* Init the RX buffer pointer register. */
bus_dmamap_load(sc->rl_tag, sc->rl_cdata.rl_rx_dmamap,
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