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authorjon <jon@FreeBSD.org>2000-10-19 08:34:32 +0000
committerjon <jon@FreeBSD.org>2000-10-19 08:34:32 +0000
commit4580b26b321a7db757880cf45873ce30aa10fd27 (patch)
treecff7f58d8da222e806bc63d80206f2c95b70295c /sys/pci/if_dcreg.h
parente3c86757f4279913a9a3eaa797fdcc8c2b9dba4f (diff)
downloadFreeBSD-src-4580b26b321a7db757880cf45873ce30aa10fd27.zip
FreeBSD-src-4580b26b321a7db757880cf45873ce30aa10fd27.tar.gz
NEWCARD/Cardbus -
This commit adds support for Xircom X3201 based cardbus cards. Support for the TDK 78Q2120 MII is also added. IBM Etherjet, Intel and Xircom cards uses these chips. Note that as a result of this commit, some Intel/DEC 21143 based cardbus cards will also attach, but not get link. That is being looked at.
Diffstat (limited to 'sys/pci/if_dcreg.h')
-rw-r--r--sys/pci/if_dcreg.h33
1 files changed, 33 insertions, 0 deletions
diff --git a/sys/pci/if_dcreg.h b/sys/pci/if_dcreg.h
index e72d8b4..f36d6b3 100644
--- a/sys/pci/if_dcreg.h
+++ b/sys/pci/if_dcreg.h
@@ -52,6 +52,7 @@
#define DC_SIARESET 0x68 /* SIA connectivity */
#define DC_10BTCTRL 0x70 /* SIA transmit and receive */
#define DC_WATCHDOG 0x78 /* SIA and general purpose port */
+#define DC_SIAGP 0x78 /* SIA and general purpose port (X3201) */
/*
* There are two general 'types' of MX chips that we need to be
@@ -75,6 +76,7 @@
#define DC_TYPE_DM9102 0x8 /* Davicom DM9102 */
#define DC_TYPE_PNICII 0x9 /* 82c115 PNIC II */
#define DC_TYPE_PNIC 0xA /* 82c168/82c169 PNIC I */
+#define DC_TYPE_XIRCOM 0xB /* Xircom X3201 */
#define DC_IS_MACRONIX(x) \
(x->dc_type == DC_TYPE_98713 || \
@@ -92,6 +94,7 @@
#define DC_IS_DAVICOM(x) (x->dc_type == DC_TYPE_DM9102)
#define DC_IS_PNICII(x) (x->dc_type == DC_TYPE_PNICII)
#define DC_IS_PNIC(x) (x->dc_type == DC_TYPE_PNIC)
+#define DC_IS_XIRCOM(x) (x->dc_type == DC_TYPE_XIRCOM)
/* MII/symbol mode port types */
#define DC_PMODE_MII 0x1
@@ -349,6 +352,25 @@
#define DC_WDOG_CTLWREN 0x08000000
/*
+ * SIA and General Purpose Port register (X3201)
+ */
+#define DC_SIAGP_RXMATCH 0x40000000
+#define DC_SIAGP_INT1 0x20000000
+#define DC_SIAGP_INT0 0x10000000
+#define DC_SIAGP_WRITE_EN 0x08000000
+#define DC_SIAGP_RXMATCH_EN 0x04000000
+#define DC_SIAGP_INT1_EN 0x02000000
+#define DC_SIAGP_INT0_EN 0x01000000
+#define DC_SIAGP_LED3 0x00800000
+#define DC_SIAGP_LED2 0x00400000
+#define DC_SIAGP_LED1 0x00200000
+#define DC_SIAGP_LED0 0x00100000
+#define DC_SIAGP_MD_GP3_OUTPUT 0x00080000
+#define DC_SIAGP_MD_GP2_OUTPUT 0x00040000
+#define DC_SIAGP_MD_GP1_OUTPUT 0x00020000
+#define DC_SIAGP_MD_GP0_OUTPUT 0x00010000
+
+/*
* Size of a setup frame.
*/
#define DC_SFRAME_LEN 192
@@ -834,6 +856,17 @@ struct dc_softc {
#define DC_DEVICEID_EN1217 0x1217
/*
+ * Xircom vendor ID
+ */
+#define DC_VENDORID_XIRCOM 0x115d
+
+/*
+ * Xircom device IDs.
+ */
+#define DC_DEVICEID_X3201 0x0003
+
+
+/*
* PCI low memory base and low I/O base register, and
* other PCI registers.
*/
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