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| author | dfr <dfr@FreeBSD.org> | 2000-07-12 10:13:07 +0000 |
|---|---|---|
| committer | dfr <dfr@FreeBSD.org> | 2000-07-12 10:13:07 +0000 |
| commit | 6ab55f97093431d174fc5d9f839fe4f13aebcafe (patch) | |
| tree | 13ae3615beebc7b58ec7387f19eb27c864c7d781 /sys/pci/agpreg.h | |
| parent | 44b02079a7c6306451f17f95f9ddafa11928fa26 (diff) | |
| download | FreeBSD-src-6ab55f97093431d174fc5d9f839fe4f13aebcafe.zip FreeBSD-src-6ab55f97093431d174fc5d9f839fe4f13aebcafe.tar.gz | |
Add support for Intel's i810 chipset with integrated graphics. An
associated patch to XFree86 allows the X server to work with this chipset
on FreeBSD. Additional work will include porting the Linux 3D driver.
Submitted by: Ruslan Ermilov <ru@FreeBSD.org>
Diffstat (limited to 'sys/pci/agpreg.h')
| -rw-r--r-- | sys/pci/agpreg.h | 41 |
1 files changed, 41 insertions, 0 deletions
diff --git a/sys/pci/agpreg.h b/sys/pci/agpreg.h index 79dab08..3d32c76 100644 --- a/sys/pci/agpreg.h +++ b/sys/pci/agpreg.h @@ -110,5 +110,46 @@ #define AGP_AMD751_ATTBASE 0x04 #define AGP_AMD751_TLBCTRL 0x0c +/* + * Config registers for i810 device 0 + */ +#define AGP_I810_SMRAM 0x70 +#define AGP_I810_SMRAM_GMS 0xc0 +#define AGP_I810_SMRAM_GMS_DISABLED 0x00 +#define AGP_I810_SMRAM_GMS_ENABLED_0 0x40 +#define AGP_I810_SMRAM_GMS_ENABLED_512 0x80 +#define AGP_I810_SMRAM_GMS_ENABLED_1024 0xc0 +#define AGP_I810_MISCC 0x72 +#define AGP_I810_MISCC_WINSIZE 0x0001 +#define AGP_I810_MISCC_WINSIZE_64 0x0000 +#define AGP_I810_MISCC_WINSIZE_32 0x0001 +#define AGP_I810_MISCC_PLCK 0x0008 +#define AGP_I810_MISCC_PLCK_UNLOCKED 0x0000 +#define AGP_I810_MISCC_PLCK_LOCKED 0x0008 +#define AGP_I810_MISCC_WPTC 0x0030 +#define AGP_I810_MISCC_WPTC_NOLIMIT 0x0000 +#define AGP_I810_MISCC_WPTC_62 0x0010 +#define AGP_I810_MISCC_WPTC_50 0x0020 +#define AGP_I810_MISCC_WPTC_37 0x0030 +#define AGP_I810_MISCC_RPTC 0x00c0 +#define AGP_I810_MISCC_RPTC_NOLIMIT 0x0000 +#define AGP_I810_MISCC_RPTC_62 0x0040 +#define AGP_I810_MISCC_RPTC_50 0x0080 +#define AGP_I810_MISCC_RPTC_37 0x00c0 + +/* + * Config registers for i810 device 1 + */ +#define AGP_I810_GMADR 0x10 +#define AGP_I810_MMADR 0x14 + +/* + * Memory mapped register offsets for i810 chipset. + */ +#define AGP_I810_PGTBL_CTL 0x2020 +#define AGP_I810_DRT 0x3000 +#define AGP_I810_DRT_UNPOPULATED 0x00 +#define AGP_I810_DRT_POPULATED 0x01 +#define AGP_I810_GTT 0x10000 #endif /* !_PCI_AGPREG_H_ */ |
