I don't believe these are used at all, and can be safely removed

7 files changed, 0 insertions, 1004 deletions

diff --git a/sys/pccard/driver.h b/sys/pccard/driver.h
deleted file mode 100644
index f5705ab..0000000
--- a/sys/pccard/driver.h
+++ /dev/null
@@ -1,24 +0,0 @@
-/*-
- * pccard driver interface.
- * Bruce Evans, November 1995.
- * This file is in the public domain.
- *
- * $FreeBSD$
- */
-
-#ifndef _PCCARD_DRIVER_H_
-#define	_PCCARD_DRIVER_H_
-
-struct pccard_device;
-
-void	pccard_add_driver(struct pccard_device *);
-
-enum beepstate { BEEP_OFF, BEEP_ON };
-
-void	pccard_insert_beep(void);
-void	pccard_remove_beep(void);
-void	pccard_success_beep(void);
-void	pccard_failure_beep(void);
-int	pccard_beep_select(int);
-
-#endif /* !_PCCARD_DRIVER_H_ */
diff --git a/sys/pccard/i82365.h b/sys/pccard/i82365.h
deleted file mode 100644
index 1057d7c..0000000
--- a/sys/pccard/i82365.h
+++ /dev/null
@@ -1,345 +0,0 @@
-/*
- *	i82365.h - Definitions for Intel 82365 PCIC
- *	PCMCIA Card Interface Controller
- *
- * originally by Barry Jaspan; hacked over by Keith Moore
- * hacked to unrecognisability by Andrew McRae (andrew@mega.com.au)
- *
- * Updated 3/3/95 to include Cirrus Logic stuff.
- *-------------------------------------------------------------------------
- */
-/*-
- * Copyright (c) 2001 M. Warner Losh.  All rights reserved.
- * Copyright (c) 1995 Andrew McRae.  All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 3. The name of the author may not be used to endorse or promote products
- *    derived from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
- * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
- * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
- * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
- * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
- * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
- * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
- * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- * $FreeBSD$
- */
-
-#define	PCIC_I82365	0		/* Intel i82365SL-A/B or clone */
-#define	PCIC_IBM	1		/* IBM clone */
-#define	PCIC_VLSI	2		/* VLSI chip */
-#define	PCIC_PD6722	3		/* Cirrus logic PD6722 */
-#define	PCIC_PD6710	4		/* Cirrus logic PD6710 */
-#define	PCIC_VG365	5		/* Vadem 365 */
-#define	PCIC_VG465      6		/* Vadem 465 */
-#define	PCIC_VG468	7		/* Vadem 468 */
-#define	PCIC_VG469	8		/* Vadem 469 */
-#define	PCIC_RF5C296	9		/* Ricoh RF5C296 */
-#define	PCIC_RF5C396	10		/* Ricoh RF5C396 */
-#define	PCIC_IBM_KING	11		/* IBM KING PCMCIA Controller */
-#define PCIC_I82365SL_DF 12		/* Intel i82365sl-DF step */
-#define PCIC_PD6729	13		/* Cirrus Logic PD6729 */
-#define PCIC_PD673X	14		/* Cirrus Logic PD673x */
-
-/*
- *	Address of the controllers. Each controller can manage
- *	two PCMCIA slots. Up to 8 slots are supported in total.
- *	The PCIC controller is accessed via an index port and a
- *	data port. The index port has the 8 bit address of the
- *	register accessed via the data port. How I long for
- *	real memory mapped I/O!
- *	The top two bits of the index address are used to
- *	identify the port number, and the lower 6 bits
- *	select one of the 64 possible data registers.
- */
-#define PCIC_INDEX	0			/* Index register */
-#define PCIC_DATA	1			/* Data register */
-#define PCIC_NPORT	2			/* Number of ports */
-#define PCIC_PORT_0	0x3e0			/* index reg, chips 0 and 1 */
-
-/*
- *	Register index addresses.
- */
-#define PCIC_ID_REV	0x00	/* Identification and Revision */
-#define PCIC_STATUS	0x01	/* Interface Status */
-#define PCIC_POWER	0x02	/* Power and RESETDRV control */
-#define PCIC_INT_GEN	0x03	/* Interrupt and General Control */
-#define PCIC_STAT_CHG	0x04	/* Card Status Change */
-#define PCIC_STAT_INT	0x05	/* Card Status Change Interrupt Config */
-#define PCIC_ADDRWINE	0x06	/* Address Window Enable */
-#define PCIC_IOCTL	0x07	/* I/O Control */
-#define PCIC_IO0	0x08	/* I/O Address 0 */
-#define PCIC_IO1	0x0c	/* I/O Address 1 */
-#define	PCIC_MEMBASE	0x10	/* Base of memory window registers */
-#define PCIC_CDGC	0x16	/* Card Detect and General Control */
-#define PCIC_MISC1	0x16	/* PD67xx: Misc control register 1 per slot */
-#define PCIC_GLO_CTRL	0x1e	/* Global Control Register */
-#define PCIC_MISC2	0x1e	/* PD67xx: Misc control register 2 per chip */
-#define PCIC_CLCHIP	0x1f	/* PD67xx: Chip I/D */
-#define PCIC_EXT_IND	0x2e	/* PD67xx: Extended Index */
-#define PCIC_EXTENDED	0x2f	/* PD67xx: Extended register */
-#define PCIC_CVSR	0x2f	/* Vadem: Voltage select register */
-#define PCIC_RICOH_MCR2 0x2f	/* Ricoh: Mode Control Register 2 */
-
-#define PCIC_VMISC	0x3a	/* Vadem: Misc control register */
-#define PCIC_RICOH_ID	0x3a	/* Ricoh: ID register */
-
-#define PCIC_TOPIC_FCR	0x3e	/* Toshiba ToPIC: Function Control Register */
-
-#define	PCIC_TIME_SETUP0	0x3a
-#define	PCIC_TIME_CMD0		0x3b
-#define	PCIC_TIME_RECOV0	0x3c
-#define	PCIC_TIME_SETUP1	0x3d
-#define	PCIC_TIME_CMD1		0x3e
-#define	PCIC_TIME_RECOV1	0x3f
-
-/* Yenta only registers */
-#define PCIC_MEMORY_HIGH0	0x40	/* A31..A25 of mapping addres for */
-#define PCIC_MEMORY_HIGH1	0x41	/* the memory windows. */
-#define PCIC_MEMORY_HIGH2	0x42
-#define PCIC_MEMORY_HIGH3	0x43
-
-
-#define	PCIC_SLOT_SIZE	0x40	/* Size of register set for one slot */
-
-/* Now register bits, ordered by reg # */
-
-/* For Identification and Revision (PCIC_ID_REV) */
-#define PCIC_INTEL0	0x82	/* Intel 82365SL Rev. 0; Both Memory and I/O */
-#define PCIC_INTEL1	0x83	/* Intel 82365SL Rev. 1; Both Memory and I/O */
-#define PCIC_INTEL2	0x84	/* Intel 82365SL step D */
-#define PCIC_VLSI82C146	0x84	/* VLSI 82C146 */
-#define PCIC_IBM1	0x88	/* IBM PCIC clone; Both Memory and I/O */
-#define PCIC_IBM2	0x89	/* IBM PCIC clone; Both Memory and I/O */
-#define PCIC_IBM3	0x8a	/* IBM KING PCIC clone; Both Memory and I/O */
-
-/* For Interface Status register (PCIC_STATUS) */
-#define PCIC_VPPV	0x80	/* Vpp_valid or reserved*/
-#define PCIC_RICOH_5VCARD 0x80	/* 5V card detected */
-#define PCIC_POW	0x40	/* PC Card power active */
-#define PCIC_READY	0x20	/* Ready/~Busy */
-#define PCIC_MWP	0x10	/* Memory Write Protect */
-#define PCIC_CD		0x0C	/* Both card detect bits */
-#define PCIC_BVD	0x03	/* Both Battery Voltage Detect bits */
-
-/* For the Power and RESETDRV register (PCIC_POWER) */
-#define PCIC_OUTENA	0x80	/* Output Enable */
-#define PCIC_DISRST	0x40	/* Disable RESETDRV */
-#define PCIC_APSENA	0x20	/* Auto Pwer Switch Enable */
-#define PCIC_PCPWRE	0x10	/* PC Card Power Enable */
-#define	PCIC_VCC	0x18	/* Vcc control bits */
-#define	PCIC_VCC_5V	0x10	/* 5 volts */
-#define	PCIC_VCC_ON	0x10	/* Turn on VCC on some chips. */
-#define	PCIC_VCC_3V	0x18	/* 3 volts */
-#define	PCIC_VCC_5V_KING	0x14	/* 5 volts for KING PCIC */
-#define	PCIC_VPP	0x03	/* Vpp control bits */
-#define	PCIC_VPP_5V	0x01	/* 5 volts */
-#define	PCIC_VPP_12V	0x02	/* 12 volts */
-
-/* For the Interrupt and General Control register (PCIC_INT_GEN) */
-#define PCIC_CARDRESET	0x40	/* Card reset 0 = Reset, 1 = Normal */
-#define PCIC_CARDTYPE	0x20	/* Card Type 0 = memory, 1 = I/O */
-#define		PCIC_IOCARD	0x20
-#define		PCIC_MEMCARD	0x00
-#define	PCIC_INTR_ENA	0x10	/* PCI CSC Interrupt enable */
-
-/* For the Card Status Change register (PCIC_STAT_CHG) */
-#define PCIC_CDTCH	0x08	/* Card Detect Change */
-#define PCIC_RDYCH	0x04	/* Ready Change */
-#define PCIC_BATWRN	0x02	/* Battery Warning */
-#define PCIC_BATDED	0x01	/* Battery Dead */
-
-/* For the Card status change interrupt PCIC_STAT_INT */
-#define PCIC_CSCSELECT		0xf0	/* CSCSELECT */
-#define PCIC_SI_IRQ_SHIFT	4
-#define PCIC_CDEN		0x8
-#define PCIC_READYEN		0x4
-#define PCIC_BATWARNEN		0x2
-#define PCIC_BATDEADEN		0x1
-
-/*
- * For the Address Window Enable Register (PCIC_ADDRWINE)
- * The lower 5 bits contain enable bits for the memory
- * windows (LSB = memory window 0).
- */
-#define PCIC_MEMCS16	0x20	/* ~MEMCS16 Decode A23-A12 */
-#define PCIC_IO0_EN	0x40	/* I/O Window 0 Enable */
-#define PCIC_IO1_EN	0x80	/* I/O Window 1 Enable */
-
-/*
- * For the I/O Control Register (PCIC_IOCTL)
- * The lower nybble is the flags for I/O window 0
- * The upper nybble is the flags for I/O window 1
- */
-#define PCIC_IO_16BIT	0x01	/* I/O to this segment is 16 bit */
-#define PCIC_IO_CS16	0x02	/* I/O cs16 source is the card */
-#define PCIC_IO_0WS	0x04	/* zero wait states added on 8 bit cycles */
-#define PCIC_IO_WS	0x08	/* Wait states added for 16 bit cycles */
-
-/*
- *	The memory window registers contain the start and end
- *	physical host address that the PCIC maps to the card,
- *	and an offset calculated from the card memory address.
- *	All values are shifted down 12 bits, so allocation is
- *	done in 4Kb blocks. Only 12 bits of each value is
- *	stored, limiting the range to the ISA address size of
- *	24 bits. The upper 4 bits of the most significant byte
- *	within the values are used for various flags.
- *
- *	The layout is:
- *
- *	base+0 : lower 8 bits of system memory start address
- *	base+1 : upper 4 bits of system memory start address + flags
- *	base+2 : lower 8 bits of system memory end address
- *	base+3 : upper 4 bits of system memory end address + flags
- *	base+4 : lower 8 bits of offset to card address
- *	base+5 : upper 4 bits of offset to card address + flags
- *
- *	The following two bytes are reserved for other use.
- */
-#define	PCIC_MEMSIZE	8
-/*
- *	Flags for system memory start address upper byte
- */
-#define PCIC_ZEROWS	0x40	/* Zero wait states */
-#define PCIC_DATA16	0x80	/* Data width is 16 bits */
-
-/*
- *	Flags for system memory end address upper byte
- */
-#define PCIC_MW0	0x40	/* Wait state bit 0 */
-#define PCIC_MW1	0x80	/* Wait state bit 1 */
-
-/*
- *	Flags for card offset upper byte
- */
-#define PCIC_REG	0x40	/* Attribute/Common select (why called Reg?) */
-#define PCIC_WP		0x80	/* Write-protect this window */
-
-/* For Card Detect and General Control register (PCIC_CDGC) */
-#define PCIC_16_DL_INH	0x01	/* 16-bit memory delay inhibit */
-#define PCIC_CNFG_RST_EN 0x02	/* configuration reset enable */
-#define PCIC_GPI_EN	0x04	/* GPI Enable */
-#define PCIC_GPI_TRANS	0x08	/* GPI Transition Control */
-#define PCIC_CDRES_EN	0x10	/* card detect resume enable */
-#define PCIC_SW_CD_INT	0x20	/* s/w card detect interrupt */
-#define PCIC_VS1STAT	0x40	/* 0 VS1# low, 1 VS1# high */
-#define PCIC_VS2STAT	0x80	/* 0 VS2# low, 1 VS2# high */
-
-/* CL-PD67[12]x: For 3.3V cards, etc. (PCIC_MISC1) */
-#define PCIC_MISC1_5V_DETECT 0x01	/* PD6710 only */
-#define PCIC_MISC1_VCC_33    0x02	/* Set Vcc is 3.3V, else 5.0V */
-#define PCIC_MISC1_PMINT     0x04	/* Pulse management intr */
-#define PCIC_MISC1_PCINT     0x08	/* Pulse card interrupt */
-#define PCIC_MISC1_SPEAKER   0x10	/* Enable speaker */
-#define PCIC_MISC1_INPACK    0x80	/* INPACK throttles data */
-
-/* i82365B and newer (!PD67xx) Global Control register (PCIC_GLO_CTRL) */
-#define PCIC_PWR_DOWN	0x01	/* power down */
-#define PCIC_LVL_MODE	0x02	/* level mode interrupt enable */
-#define PCIC_WB_CSCINT	0x04	/* explicit write-back csc intr */
-/* Rev B only */
-#define PCIC_IRQ0_LEVEL 0x08	/* irq 14 pulse mode enable */
-#define PCIC_IRQ1_LEVEL 0x10
-
-/* CL-PD67[12]x: For Misc. Control Register 2 (PCIC_MISC2) */
-#define PCIC_LPDM_EN	0x02	/* Cirrus PD672x: low power dynamic mode */
-
-/* CL-PD67[12]x: Chip info (PCIC_CLCHIP) */
-#define PCIC_CLC_TOGGLE 0xc0		/* These bits toggle 1 -> 0 */
-#define PCIC_CLC_DUAL	0x20		/* Single/dual socket version */
-
-/* Cirrus Logic: Extended Registers (PCIC_EXT_IND) */
-#define PCIC_EXT_DATA	0x0a		/* External Data */
-
-/* EXT_DATA */
-#define PCIC_VS1A	0x01
-#define PCIC_VS2A	0x02
-#define PCIC_VS1B	0x04
-#define PCIC_VS2B	0x08
-
-/* Cirrus Logic: Extended register Extension Control 1 */
-#define PCIC_EXTCTRL1	0x03
-#define PCIC_EC1_VCC_LOCK 0x1		/* Vcc Power locked to s/w change */
-#define PCIC_EC1_AUTO_POWER_CLEAR 0x2	/* Vcc power cleared on eject? */
-#define PCIC_EC1_LED_ENABLE 0x4		/* LED activity enable */
-#define PCIC_EC1_CARD_IRQ_INV 0x8	/* Card IRQ level inverted for pci? */
-#define PCIC_EC1_CSC_IRQ_INV 0x10	/* CSC IRQ level inverted for pci? */
-#define PCIC_EC1_PULLUP 0x20		/* Dis pullup when 1. */
-
-/* Vadem: Card Voltage Select register (PCIC_CVSR) */
-#define PCIC_CVSR_VS	0x03		/* Voltage select */
-#define PCIC_CVSR_VS_5	0x00		/* 5.0 V */
-#define PCIC_CVSR_VS_33a 0x01		/* alt 3.3V */
-#define PCIC_CVSR_VS_XX	0x02		/* X.XV when available */
-#define PCIC_CVSR_VS_33 0x03		/* 3.3V */
-
-/* Ricoh: Misc Control Register 2 (PCIC_RICOH_MCR2) */
-#define PCIC_MCR2_VCC_33 0x01		/* 3.3V */
-
-/* Vadem: misc register (PCIC_VMISC) */
-#define PCIC_VADEMREV	0x40
-
-/* Ricoh: ID register values (PCIC_RICOH_ID) */
-#define PCIC_RID_296	0x32
-#define PCIC_RID_396	0xb2
-
-/* Toshiba ToPIC: Function Control Register */
-#define PCIC_FCR_3V_EN		0x01	/* Enable 3V cards */
-#define PCIC_FCR_VS_EN		0x02	/* Voltage Sense enable */
-
-/*
- *	Mask of allowable interrupts.
- *
- *	For IBM-AT machines, irqs 3, 4, 5, 7, 9, 10, 11, 12, 14, 15 are
- *	allowed.  Nearly all IBM-AT machines with pcic cards or bridges
- *	wire these interrupts (or a subset thereof) to the corresponding
- *	pins on the ISA bus.  Some older laptops are reported to not route
- *	all the interrupt pins to the bus because the designers knew that
- *	some would conflict with builtin devices.
- *
- *	For NEC PC98 machines, irq 3, 5, 6, 9, 10, 11, 12, 13 are allowed.
- *	These correspond to the C-BUS signals INT 0, 1, 2, 3, 41, 42, 5, 6
- *	respectively.  This is with the desktop C-BUS addin card.
- *
- *	Hiroshi TSUKADA-san writes in FreeBSD98-testers that cbus IRQ
- *	6 is routed to the IRQ 7 pin of the pcic in pc98 cbus based
- *	cards.  I do not know how pc98 laptop models are wired.
- */
-#ifdef PC98
-#define	PCIC_INT_MASK_ALLOWED	0x3E68		/* PC98 */
-#else
-#define	PCIC_INT_MASK_ALLOWED	0xDEB8		/* AT */
-#endif
-
-#define	PCIC_IO_WIN	2
-#define	PCIC_MEM_WIN	5
-
-#define	PCIC_CARD_SLOTS	4
-#define PCIC_MAX_CARDS	2
-#define PCIC_MAX_SLOTS (PCIC_MAX_CARDS * PCIC_CARD_SLOTS)
-
-/* Plug and play */
-#define PCIC_PNP_ACTIONTEC	0x1802A904	/* AEI0218 */
-#define PCIC_PNP_IBM3765	0x65374d24	/* IBM3765 */
-#define PCIC_PNP_82365		0x000ED041	/* PNP0E00 */
-#define PCIC_PNP_CL_PD6720	0x010ED041	/* PNP0E01 */
-#define PCIC_PNP_VLSI_82C146	0x020ED041	/* PNP0E02 */
-#define PCIC_PNP_82365_CARDBUS	0x030ED041	/* PNP0E03 */
-#define PCIC_PNP_SCM_SWAPBOX	0x69046d4c	/* SMC0469 */
-
-/* C-Bus PnP Definitions */
-#define PCIC_NEC_PC9801_102	0x9180a3b8	/* NEC8091 PC-9801-102 */
-#define	PCIC_NEC_PC9821RA_E01	0x2181a3b8	/* NEC8121 PC-9821RA-E01 */
diff --git a/sys/pccard/meciareg.h b/sys/pccard/meciareg.h
deleted file mode 100644
index b54ae4d..0000000
--- a/sys/pccard/meciareg.h
+++ /dev/null
@@ -1,60 +0,0 @@
-/*
- * meciareg.h
- *
- * PC9801 original PCMCIA controller code for NS/A,Ne,NX/C,NR/L.
- * by Noriyuki Hosobuchi <hoso@ce.mbn.or.jp>
- *
- * $FreeBSD$
- */
-
-/*--- I/O port definition */
-#define	MECIA_REG0		0x0a8e	/* byte */
-#define	MECIA_REG1		0x1a8e	/* byte */
-#define	MECIA_REG2		0x2a8e	/* byte */
-#define	MECIA_REG3		0x3a8e	/* byte : Interrupt */
-#define	MECIA_REG4		0x4a8e	/* word : PC98 side I/O base */
-#define	MECIA_REG5		0x5a8e	/* word : Card side I/O base */
-#define	MECIA_REG7		0x7a8e	/* byte */
-
-#define	MECIA_REG_WINSEL	0x1e8e	/* byte : win bank select register */
-#define	MECIA_REG_PAGOFS	0x0e8e	/* word */
-
-/* PC98_REG_WINSEL */
-#define	MECIA_MAPWIN		0x84	/* map Card on 0xda0000 - 0xdbffff */
-#define	MECIA_UNMAPWIN		0x00
-
-/* MECIA_REG1 */
-#define	MECIA_CARDEXIST		0x08	/* 1:exist 0:not exist */
-
-/* MECIA_REG2 */
-#define	MECIA_MAPIO		0x80	/* 1:I/O 0:Memory */
-#define	MECIA_IOTHROUGH		0x40	/* 0:I/O map 1:I/O addr-through */
-#define	MECIA_8BIT		0x20	/* bit width 1:8bit 0:16bit */
-#define	MECIA_MAP128		0x10	/* I/O map size 1:128byte 0:16byte */
-#define	MECIA_VCC3P3V		0x02	/* Vcc 1:3.3V 0:5.0V */
-
-/* MECIA_REG3 */
-#define	MECIA_INT0		(0xf8 + 0x0)	/* INT0(IRQ3) */
-#define	MECIA_INT1		(0xf8 + 0x1)	/* INT1(IRQ5) */
-#define	MECIA_INT2		(0xf8 + 0x2)	/* INT2(IRQ6) */
-#define	MECIA_INT4		(0xf8 + 0x4)	/* INT4(IRQ10) */
-#define	MECIA_INT5		(0xf8 + 0x5)	/* INT5(IRQ12) */
-#define	MECIA_INTDISABLE	(0xf8 + 0x7)	/* disable interrupt */
-
-/* MECIA_REG7 */
-#define	MECIA_ATTRMEM		0x20	/* 1:attr mem 0:common mem */
-#define	MECIA_VPP12V		0x10	/* Vpp 0:5V 1:12V */
-
-
-#ifdef KERNEL
-extern int mecia_mode;		/* in 'pccard/pcic.c' */
-#define mecia_8bit_on()	\
-	if (mecia_mode & MECIA_8BIT)	\
-		outb(MECIA_REG2, inb(MECIA_REG2) | MECIA_8BIT)
-#define mecia_8bit_off()	\
-	if (mecia_mode & MECIA_8BIT)	\
-		outb(MECIA_REG2, inb(MECIA_REG2) & ~MECIA_8BIT)
-#define mecia_map128()		(mecia_mode & MECIA_MAP128)
-#endif
-
-#define	MECIA_INT_MASK_ALLOWED	0x3E68		/* PC98 */
diff --git a/sys/pccard/pccard_nbk.h b/sys/pccard/pccard_nbk.h
deleted file mode 100644
index fed7310..0000000
--- a/sys/pccard/pccard_nbk.h
+++ /dev/null
@@ -1,36 +0,0 @@
-/*-
- * Copyright (c) 1999, 2001 M. Warner Losh.  All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * $FreeBSD$
- */
-
-#ifndef PCCARD_PCCARD_NBK_H
-#define PCCARD_PCCARD_NBK_H
-
-SYSCTL_DECL(_machdep_pccard);
-
-struct pccard_device;
-extern devclass_t pccard_devclass;
-
-#endif /* ! PCCARD_PCCARD_NBK_H */
diff --git a/sys/pccard/pcic_pci.h b/sys/pccard/pcic_pci.h
deleted file mode 100644
index d2a96d2..0000000
--- a/sys/pccard/pcic_pci.h
+++ /dev/null
@@ -1,270 +0,0 @@
-/*-
- * Copyright (c) 2001 M. Warner Losh. All rights reserved.
- * Copyright (c) 1997 Ted Faber. All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- *
- * 1. Redistributions of source code must retain the above copyright
- *    notice immediately at the beginning of the file, without modification,
- *    this list of conditions, and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 3. Absolutely no warranty of function or purpose is made by the author
- *    Ted Faber.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
- * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
- * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
- * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
- * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
- * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
- * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
- * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- * $FreeBSD$
- */
-
-/* Share the devid database with NEWCARD */
-#include <dev/pccbb/pccbbdevid.h>
-
-/* CL-PD683x CardBus defines */
-#define	CLPD6833_CFG_MISC_1		0x98
-
-/* Configuration constants */
-#define	CLPD6832_BCR_MGMT_IRQ_ENA	0x0800
-#define CLPD6833_CM1_MGMT_EXCA_ENA	0x0001	/* Set ExCA, Clr PCI */
-
-/* End of CL-PD6832 defines */
-/* Texas Instruments PCI-1130/1131 CardBus Controller */
-#define TI113X_PCI_SYSTEM_CONTROL	0x80	/* System Control */
-#define TI12XX_PCI_MULTIMEDIA_CONTROL	0x84	/* Zoom Video */
-#define TI12XX_PCI_MFUNC		0x8c	/* multifunction pins */
-#define TI113X_PCI_RETRY_STATUS		0x90	/* Retry Status */
-#define TI113X_PCI_CARD_CONTROL		0x91	/* Card Control */
-#define TI113X_PCI_DEVICE_CONTROL	0x92	/* Device Control */
-#define TI113X_PCI_BUFFER_CONTROL	0x93	/* Buffer Control */
-#define TI12XX_PCI_DIAGNOSTIC		0x93	/* Diagnostic register */
-#define TI113X_PCI_SOCKET_DMA0		0x94	/* Socket DMA Register 0 */
-#define TI113X_PCI_SOCKET_DMA1		0x98	/* Socket DMA Register 1 */
-
-/* Card control register (TI113X_SYSTEM_CONTROL == 0x80) */
-#define TI113X_SYSCNTL_INTRTIE		0x20000000u
-#define TI12XX_SYSCNTL_PCI_CLOCK	0x08000000u
-#define TI113X_SYSCNTL_SMIENB		0x00800000u
-#define TI113X_SYSCNTL_VCC_PROTECT	0x00200000u
-#define TI113X_SYSCNTL_CLKRUN_SEL	0x00000080u
-#define	TI113X_SYSCNTL_PWRSAVINGS	0x00000040u
-#define TI113X_SYSCNTL_KEEP_CLK		0x00000002u
-#define TI113X_SYSCNTL_CLKRUN_ENA	0x00000001u
-
-/* MFUNC register (TI12XX_MFUNC == 0x8c) */
-#define TI12XX_MFUNC_PIN0		0x0000000fu
-#define   TI12XX_MFUNC_PIN0_INTA	0x2
-#define TI12XX_MFUNC_PIN1		0x000000f0u
-#define   TI12XX_MFUNC_PIN1_INTB	0x20
-#define TI12XX_MFUNC_PIN2		0x00000f00u
-#define TI12XX_MFUNC_PIN3		0x0000f000u
-#define TI12XX_MFUNC_PIN4		0x000f0000u
-#define TI12XX_MFUNC_PIN5		0x00f00000u
-#define TI12XX_MFUNC_PIN6		0x0f000000u
-
-/* Card control register (TI113X_CARD_CONTROL == 0x91) */
-#define TI113X_CARDCNTL_RING_ENA	0x80u
-#define TI113X_CARDCNTL_ZOOM_VIDEO	0x40u
-#define TI113X_CARDCNTL_PCI_IRQ_ENA	0x20u
-#define TI113X_CARDCNTL_PCI_IREQ	0x10u
-#define TI113X_CARDCNTL_PCI_CSC		0x08u
-#define	TI113X_CARDCNTL_MASK		(TI113X_CARDCNTL_PCI_IRQ_ENA | TI113X_CARDCNTL_PCI_IREQ | TI113X_CARDCNTL_PCI_CSC)
-#define	TI113X_FUNC0_VALID		TI113X_CARDCNTL_MASK
-#define	TI113X_FUNC1_VALID		(TI113X_CARDCNTL_PCI_IREQ | TI113X_CARDCNTL_PCI_CSC)
-/* Reserved bit				0x04u */
-#define TI113X_CARDCNTL_SPKR_ENA	0x02u
-#define TI113X_CARDCNTL_INT		0x01u
-
-/* Device control register (TI113X_DEVICE_CONTROL == 0x92) */
-#define	TI113X_DEVCNTL_5V_SOCKET	0x40u
-#define	TI113X_DEVCNTL_3V_SOCKET	0x20u
-#define	TI113X_DEVCNTL_INTR_MASK	0x06u
-#define	TI113X_DEVCNTL_INTR_NONE	0x00u
-#define	TI113X_DEVCNTL_INTR_ISA		0x02u
-#define	TI113X_DEVCNTL_INTR_SERIAL	0x04u
-/* TI12XX specific code */
-#define	TI12XX_DEVCNTL_INTR_ALLSERIAL	0x06u
-
-/* Diagnostic register (misnamed) TI12XX_PCI_DIAGNOSTIC == 0x93 */
-#define TI12XX_DIAG_CSC_INTR		0x20	/* see datasheet */
-
-/* Texas Instruments PCI-1130/1131 CardBus Controller */
-#define	TI113X_ExCA_IO_OFFSET0		0x36	/* Offset of I/O window */
-#define	TI113X_ExCA_IO_OFFSET1		0x38	/* Offset of I/O window */
-#define	TI113X_ExCA_MEM_WINDOW_PAGE	0x3C	/* Memory Window Page */
-
-/*
- * Ricoh R5C47[5678] parts have these registers.  Maybe the 46x also use
- * them, but I can't find out for sure without datasheets...
- */
-#define	R5C47X_MISC_CONTROL_REGISTER_2	0xa0
-#define R5C47X_MCR2_CSC_TO_INTX_DISABLE 0x0010	/* Bit 7 */
-
-/*
- * Special resister definition for Toshiba ToPIC95/97
- * These values are borrowed from pcmcia-cs/Linux.
- */
-#define TOPIC_SOCKET_CTRL  0x90
-# define TOPIC_SOCKET_CTRL_SCR_IRQSEL 0x00000001 /* PCI intr */
-
-#define TOPIC_SLOT_CTRL    0xa0
-# define TOPIC_SLOT_CTRL_SLOTON       0x00000080
-# define TOPIC_SLOT_CTRL_SLOTEN       0x00000040
-# define TOPIC_SLOT_CTRL_ID_LOCK      0x00000020
-# define TOPIC_SLOT_CTRL_ID_WP        0x00000010
-# define TOPIC_SLOT_CTRL_PORT_MASK    0x0000000c
-# define TOPIC_SLOT_CTRL_PORT_SHIFT            2
-# define TOPIC_SLOT_CTRL_OSF_MASK     0x00000003
-# define TOPIC_SLOT_CTRL_OSF_SHIFT             0
-
-# define TOPIC_SLOT_CTRL_INTB         0x00002000
-# define TOPIC_SLOT_CTRL_INTA         0x00001000
-# define TOPIC_SLOT_CTRL_INT_MASK     0x00003000
-# define TOPIC_SLOT_CTRL_CLOCK_MASK   0x00000c00
-# define TOPIC_SLOT_CTRL_CLOCK_2      0x00000800 /* PCI Clock/2 */
-# define TOPIC_SLOT_CTRL_CLOCK_1      0x00000400 /* PCI Clock */
-# define TOPIC_SLOT_CTRL_CLOCK_0      0x00000000 /* no clock */
-# define TOPIC97_SLOT_CTRL_STSIRQP    0x00000400 /* status change intr pulse */
-# define TOPIC97_SLOT_CTRL_IRQP       0x00000200 /* function intr pulse */
-# define TOPIC97_SLOT_CTRL_PCIINT     0x00000100 /* intr routing to PCI INT */
-
-# define TOPIC_SLOT_CTRL_CARDBUS      0x80000000
-# define TOPIC_SLOT_CTRL_VS1          0x04000000
-# define TOPIC_SLOT_CTRL_VS2          0x02000000
-# define TOPIC_SLOT_CTRL_SWDETECT     0x01000000
-
-#define TOPIC_REG_CTRL     0x00a4
-# define TOPIC_REG_CTRL_RESUME_RESET  0x80000000
-# define TOPIC_REG_CTRL_REMOVE_RESET  0x40000000
-# define TOPIC97_REG_CTRL_CLKRUN_ENA  0x20000000
-# define TOPIC97_REG_CTRL_TESTMODE    0x10000000
-# define TOPIC97_REG_CTRL_IOPLUP      0x08000000
-# define TOPIC_REG_CTRL_BUFOFF_PWROFF 0x02000000
-# define TOPIC_REG_CTRL_BUFOFF_SIGOFF 0x01000000
-# define TOPIC97_REG_CTRL_CB_DEV_MASK 0x0000f800
-# define TOPIC97_REG_CTRL_CB_DEV_SHIFT 11
-# define TOPIC97_REG_CTRL_RI_DISABLE  0x00000004
-# define TOPIC97_REG_CTRL_CAUDIO_OFF  0x00000002
-# define TOPIC_REG_CTRL_CAUDIO_INVERT 0x00000001
-
-/* For Bridge Control register (CB_PCI_BRIDGE_CTRL) */
-#define CB_BCR_MASTER_ABORT	0x0020
-#define CB_BCR_CB_RESET		0x0040
-#define CB_BCR_INT_EXCA		0x0080
-#define CB_BCR_WRITE_POST_EN	0x0400
-  /* additional bits for Ricoh's cardbus products */
-#define CB_BCR_RL_3E0_EN	0x0800
-#define CB_BCR_RL_3E2_EN	0x1000
-
-/* PCI Configuration Registers (common) */
-#define	CB_PCI_VENDOR_ID	0x00	/* vendor ID */
-#define	CB_PCI_DEVICE_ID	0x02	/* device ID */
-#define	CB_PCI_COMMAND		0x04	/* PCI command */
-#define	CB_PCI_STATUS		0x06	/* PCI status */
-#define	CB_PCI_REVISION_ID	0x08	/* PCI revision ID */
-#define	CB_PCI_CLASS		0x09	/* PCI class code */
-#define	CB_PCI_CACHE_LINE_SIZE	0x0c	/* Cache line size */
-#define	CB_PCI_LATENCY		0x0d	/* PCI latency timer */
-#define	CB_PCI_HEADER_TYPE	0x0e	/* PCI header type */
-#define	CB_PCI_BIST		0x0f	/* Built-in self test */
-#define	CB_PCI_SOCKET_BASE	0x10	/* Socket/ExCA base address reg. */
-#define	CB_PCI_CB_STATUS	0x16	/* CardBus Status */
-#define	CB_PCI_PCI_BUS_NUM	0x18	/* PCI bus number */
-#define	CB_PCI_CB_BUS_NUM	0x19	/* CardBus bus number */
-#define	CB_PCI_CB_SUB_BUS_NUM	0x1A	/* Subordinate CardBus bus number */
-#define	CB_PCI_CB_LATENCY	0x1A	/* CardBus latency timer */
-#define	CB_PCI_MEMBASE0		0x1C	/* Memory base register 0 */
-#define	CB_PCI_MEMLIMIT0	0x20	/* Memory limit register 0 */
-#define	CB_PCI_MEMBASE1		0x24	/* Memory base register 1 */
-#define	CB_PCI_MEMLIMIT1	0x28	/* Memory limit register 1 */
-#define	CB_PCI_IOBASE0		0x2C	/* I/O base register 0 */
-#define	CB_PCI_IOLIMIT0		0x30	/* I/O limit register 0 */
-#define	CB_PCI_IOBASE1		0x34	/* I/O base register 1 */
-#define	CB_PCI_IOLIMIT1		0x38	/* I/O limit register 1 */
-#define	CB_PCI_INT_LINE		0x3C	/* Interrupt Line */
-#define	CB_PCI_INT_PIN		0x3D	/* Interrupt Pin */
-#define	CB_PCI_BRIDGE_CTRL	0x3E	/* Bridge Control */
-#define	CB_PCI_SUBSYS_VENDOR_ID	0x40	/* Subsystem Vendor ID */
-#define	CB_PCI_SUBSYS_ID	0x42	/* Subsystem ID */
-#define	CB_PCI_LEGACY16_IOADDR	0x44	/* Legacy 16bit I/O address */
-#define	CB_PCI_LEGACY16_IOENABLE 0x01	/* Enable Legacy 16bit I/O address */
-
-/* PCI Memory register offsets for YENTA devices */
-#define CB_SOCKET_EVENT		0x00
-#define CB_SOCKET_MASK		0x04
-#define CB_SOCKET_STATE		0x08
-#define CB_SOCKET_FORCE		0x0c
-#define CB_SOCKET_POWER		0x10
-#define CB_EXCA_OFFSET		0x800	/* Offset for ExCA registers */
-
-#define CB_SE_CD		0x6	/* Socket Event Card detect */
-#define CB_SE_POWER		0x8
-
-#define CB_SM_CD		0x6	/* Socket MASK Card detect */
-#define CB_SM_POWER		0x8
-
-/* Socket State Register */
-#define CB_SS_CARDSTS		0x00000001 /* Card Status Change */
-#define CB_SS_CD1		0x00000002 /* Card Detect 1 */
-#define CB_SS_CD2		0x00000004 /* Card Detect 2 */
-#define CB_SS_CD		0x00000006 /* Card Detect all */
-#define CB_SS_PWRCYCLE		0x00000008 /* Power Cycle */
-#define CB_SS_16BIT		0x00000010 /* 16-bit Card */
-#define CB_SS_CB		0x00000020 /* Cardbus Card */
-#define CB_SS_IREQ		0x00000040 /* Ready */
-#define CB_SS_NOTCARD		0x00000080 /* Unrecognized Card */
-#define CB_SS_DATALOST		0x00000100 /* Data Lost */
-#define CB_SS_BADVCC		0x00000200 /* Bad VccRequest */
-#define CB_SS_5VCARD		0x00000400 /* 5 V Card */
-#define CB_SS_3VCARD		0x00000800 /* 3.3 V Card */
-#define CB_SS_XVCARD		0x00001000 /* X.X V Card */
-#define CB_SS_YVCARD		0x00002000 /* Y.Y V Card */
-#define CB_SS_CARD_MASK		0x00003c00 /* *VCARD signal */
-#define CB_SS_5VSOCK		0x10000000 /* 5 V Socket */
-#define CB_SS_3VSOCK		0x20000000 /* 3.3 V Socket */
-#define CB_SS_XVSOCK		0x40000000 /* X.X V Socket */
-#define CB_SS_YVSOCK		0x80000000 /* Y.Y V Socket */
-
-/* Socket power register */
-#define CB_SP_CLKSTOP		0x80	/* Cardbus clock stop protocol */
-#define CB_SP_VCC_MASK		0x70
-#define CB_SP_VCC_0V		0x00
-					/* 0x10 is reserved 12V in VPP */
-#define CB_SP_VCC_5V		0x20
-#define CB_SP_VCC_3V		0x30
-#define CB_SP_VCC_XV		0x40
-#define CB_SP_VCC_YV		0x50
-					/* 0x60 and 0x70 are reserved */
-#define CB_SP_VPP_MASK		0x07
-#define CB_SP_VPP_0V		0x00
-#define CB_SP_VPP_12V		0x01
-#define CB_SP_VPP_5V		0x02
-#define CB_SP_VPP_3V		0x03
-#define CB_SP_VPP_XV		0x04
-#define CB_SP_VPP_YV		0x05
-
-/* Socket force register */
-#define CB_SF_INTCVS		(1 << 14)	/* Interregate CVS/CCD pins */
-#define CB_SF_5VCARD		(1 << 11)
-#define CB_SF_3VCARD		(1 << 10)
-#define CB_SF_BADVCC		(1 << 9)
-#define CB_SF_DATALOST		(1 << 8)
-#define CB_SF_NOTACARD		(1 << 7)
-#define CB_SF_CBCARD		(1 << 5)
-#define CB_SF_16CARD		(1 << 4)
-#define CB_SF_POWERCYCLE	(1 << 3)
-#define CB_SF_CCD2		(1 << 2)
-#define CB_SF_CCD1		(1 << 1)
-#define CB_SF_CSTCHG		(1 << 0)
-					/* 0x6 and 0x7 are reserved */
diff --git a/sys/pccard/pcicvar.h b/sys/pccard/pcicvar.h
deleted file mode 100644
index de2940c..0000000
--- a/sys/pccard/pcicvar.h
+++ /dev/null
@@ -1,126 +0,0 @@
-/*-
- * Copyright (c) 2001 M. Warner Losh.  All Rights Reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
- * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
- * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
- * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
- * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
- * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
- * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
- * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- * $FreeBSD$
- */
-
-/*
- *	Per-slot data table.
- */
-struct pcic_slot {
-	int offset;			/* Offset value for index */
-	char controller;		/* Device type */
-	char revision;			/* Device Revision */
-	struct slot *slt;		/* Back ptr to slot */
-	struct pcic_softc *sc;		/* Back pointer to softc */
-	u_int8_t (*getb)(struct pcic_slot *, int);
-	void   (*putb)(struct pcic_slot *, int, u_int8_t);
-	bus_space_tag_t bst;
-	bus_space_handle_t bsh;
-};
-
-enum pcic_intr_way { pcic_iw_isa = 1, pcic_iw_pci = 2 };
-
-struct pcic_softc 
-{
-	u_int32_t		slotmask;/* Mask of valid slots */
-	u_int32_t		flags;	/* Interesting flags */
-#define PCIC_AB_POWER	   0x00000001	/* Use old A/B step power */
-#define PCIC_DF_POWER	   0x00000002	/* Uses DF step regs  */
-#define PCIC_PD_POWER	   0x00000004	/* Uses CL-PD regs  */
-#define	PCIC_VG_POWER	   0x00000008	/* Uses VG power regs */
-#define PCIC_KING_POWER    0x00000010	/* Uses IBM KING regs  */
-#define PCIC_RICOH_POWER   0x00000020	/* Uses the ricoh power regs */
-#define PCIC_CARDBUS_POWER 0x00000040	/* Cardbus power regs */
-#define PCIC_YENTA_HIGH_MEMORY 0x0080	/* Can do high memory mapping */
-
-	enum pcic_intr_way	csc_route; /* How to route csc interrupts */
-	enum pcic_intr_way	func_route; /* How to route function ints */
-	int			iorid;	/* Rid of I/O region */
-	struct resource 	*iores;	/* resource for I/O region */
-	int			memrid;	/* Memory rid */
-	struct resource		*memres;/* Resource for memory mapped regs */
-	int			irqrid;	/* Irq rid */
-	struct resource		*irqres;/* Irq resource */
-	void			*ih;	/* Our interrupt handler. */
-	int			irq;
-	device_t		dev;	/* Our device */
-	void (*slot_poll)(void *);
-	struct callout_handle	timeout_ch;
-	struct pcic_slot	slots[PCIC_MAX_SLOTS];
-	int			cd_pending; /* debounce timeout active */
-	int			cd_present; /* debounced card-present state */
-	struct callout_handle	cd_ch;	/* handle for pcic_cd_insert */
-	struct pcic_chip	*chip;
-	driver_intr_t		*func_intr;
-	void			*func_arg;
-};
-
-typedef int (pcic_intr_way_t)(struct pcic_slot *, enum pcic_intr_way);
-typedef int (pcic_intr_mapirq_t)(struct pcic_slot *, int irq);
-typedef void (pcic_init_t)(device_t);
-
-struct pcic_chip
-{
-	pcic_intr_way_t *func_intr_way;
-	pcic_intr_way_t *csc_intr_way;
-	pcic_intr_mapirq_t *map_irq;
-	pcic_init_t	*init;
-};
-
-extern devclass_t	pcic_devclass;
-extern int		pcic_override_irq;
-
-int pcic_activate_resource(device_t dev, device_t child, int type, int rid,
-    struct resource *r);
-struct resource *pcic_alloc_resource(device_t dev, device_t child, int type,
-    int *rid, u_long start, u_long end, u_long count, u_int flags);
-int pcic_attach(device_t dev);
-void pcic_clrb(struct pcic_slot *sp, int reg, unsigned char mask);
-int pcic_deactivate_resource(device_t dev, device_t child, int type, int rid,
-    struct resource *r);
-void pcic_dealloc(device_t dev);
-void pcic_do_stat_delta(struct pcic_slot *sp);
-int pcic_get_memory_offset(device_t bus, device_t child, int rid,
-    u_int32_t *offset);
-int pcic_get_res_flags(device_t bus, device_t child, int restype, int rid,
-    u_long *value);
-unsigned char pcic_getb_io(struct pcic_slot *sp, int reg);
-driver_intr_t	pcic_isa_intr;
-int		pcic_isa_intr1(void *);
-pcic_intr_mapirq_t pcic_isa_mapirq;
-void pcic_putb_io(struct pcic_slot *sp, int reg, unsigned char val);
-int pcic_set_memory_offset(device_t bus, device_t child, int rid,
-    u_int32_t offset
-#if __FreeBSD_version >= 500000
-    , u_int32_t *deltap
-#endif
-    );
-int pcic_set_res_flags(device_t bus, device_t child, int restype, int rid,
-    u_long value);
-void pcic_setb(struct pcic_slot *sp, int reg, unsigned char mask);
-int pcic_setup_intr(device_t dev, device_t child, struct resource *irq,
-    int flags, driver_intr_t *intr, void *arg, void **cookiep);
-int pcic_teardown_intr(device_t dev, device_t child, struct resource *irq,
-    void *cookie);
-timeout_t 	pcic_timeout;
diff --git a/sys/pccard/slot.h b/sys/pccard/slot.h
deleted file mode 100644
index 030ff7e..0000000
--- a/sys/pccard/slot.h
+++ /dev/null
@@ -1,143 +0,0 @@
-/*
- *	Slot structures for PC-CARD interface.
- *	Each slot has a controller specific structure
- *	attached to it. A slot number allows
- *	mapping from the character device to the
- *	slot structure. This is separate to the
- *	controller slot number to allow multiple controllers
- *	to be accessed.
- *-------------------------------------------------------------------------
- */
-
-/*-
- * Copyright (c) 1995 Andrew McRae.  All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 3. The name of the author may not be used to endorse or promote products
- *    derived from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
- * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
- * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
- * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
- * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
- * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
- * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
- * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- * $FreeBSD$
- */
-
-#ifndef _PCCARD_SLOT_H
-#define _PCCARD_SLOT_H
-
-/*
- * Normally we shouldn't include stuff here, but we're trying to be
- * compatible with the long, dark hand of the past.
- */
-#include <sys/param.h>
-#include <sys/bus.h>
-#include <machine/bus.h>
-#include <sys/rman.h>
-#include <machine/resource.h>
-#if __FreeBSD_version >= 500000
-#include <sys/selinfo.h>
-#else
-#include <sys/select.h>
-#endif
-
-/*
- *	Controller data - Specific to each slot controller.
- */
-struct slot;
-struct slot_ctrl {
-	void	(*mapirq)(struct slot *, int);
-				/* Map irq */
-	int	(*mapmem)(struct slot *, int);
-				/* Map memory */
-	int	(*mapio)(struct slot *, int);
-				/* Map io */
-	void	(*reset)(void *);
-				/* init */
-	void	(*disable)(struct slot *);
-				/* Disable slot */
-	int	(*power)(struct slot *);
-				/* Set power values */
-	int	(*ioctl)(struct slot *, int, caddr_t);
-				/* ioctl to lower level */
-	void	(*resume)(struct slot *);
-				/* suspend/resume support */
-	int	maxmem;		/* Number of allowed memory windows */
-	int	maxio;		/* Number of allowed I/O windows */
-};
-
-/*
- *	Device structure for cards. Each card may have one
- *	or more pccard drivers attached to it; each driver is assumed
- *	to require at most one interrupt handler, one I/O block
- *	and one memory block. This structure is used to link the different
- *	devices together.
- */
-struct pccard_devinfo {
-	uint8_t		name[128];
-	int		running;	/* Current state of driver */
-	uint8_t		misc[DEV_MISC_LEN]; /* For any random info */
-	uint8_t		manufstr[DEV_MAX_CIS_LEN];
-	uint8_t		versstr[DEV_MAX_CIS_LEN];
-	uint8_t		cis3str[DEV_MAX_CIS_LEN];
-	uint8_t		cis4str[DEV_MAX_CIS_LEN];
-	uint32_t	manufacturer;	/* Manufacturer ID */
-	uint32_t	product;	/* Product ID */
-	uint32_t	prodext;	/* Product ID (extended) */
-	struct slot	*slt;		/* Back pointer to slot */
-	struct resource_list resources;
-};
-
-/*
- *	Per-slot structure.
- */
-struct slot {
-	int slotnum;			/* Slot number */
-	int flags;			/* Slot flags (see below) */
-	int rwmem;			/* Read/write flags */
-	int irq;			/* IRQ allocated (0 = none) */
-
-	/*
-	 *	flags.
-	 */
-	unsigned int 	insert_seq;	/* Firing up under the card */
-	struct callout_handle insert_ch;/* Insert event timeout handle */
-	struct callout_handle poff_ch;	/* Power Off timeout handle */
-
-	enum cardstate 	state, laststate; /* Current/last card states */
-	struct selinfo	selp;		/* Info for select */
-	struct mem_desc	mem[NUM_MEM_WINDOWS];	/* Memory windows */
-	struct io_desc	io[NUM_IO_WINDOWS];	/* I/O windows */
-	struct power	pwr;		/* Power values */
-	struct slot_ctrl *ctrl;		/* Per-controller data */
-	void		*cdata;		/* Controller specific data */
-	int		pwr_off_pending;/* Power status of slot */
-	device_t	dev;		/* Config system device. */
-	struct cdev *d;		/* fs device */
-};
-
-#define PCCARD_DEVICE2SOFTC(d)	((struct slot *) device_get_softc(d))
-#define PCCARD_DEV2SOFTC(d)	((struct slot *) (d)->si_drv1)
-
-enum card_event { card_removed, card_inserted, card_deactivated };
-
-struct slot	*pccard_init_slot(device_t, struct slot_ctrl *);
-void		 pccard_event(struct slot *, enum card_event);
-int		 pccard_suspend(device_t);
-int		 pccard_resume(device_t);
-
-#endif /* !_PCCARD_SLOT_H */