diff options
| author | imp <imp@FreeBSD.org> | 2001-11-09 07:33:54 +0000 |
|---|---|---|
| committer | imp <imp@FreeBSD.org> | 2001-11-09 07:33:54 +0000 |
| commit | 66dabcc793efb40567d212a22a6bd88f4d264dc0 (patch) | |
| tree | 2faca828cbc4923f603cb0cbe57b4077cdd20f36 /sys/pccard/i82365.h | |
| parent | dab2d92b007935a860120ec3ec7963659c29706f (diff) | |
| download | FreeBSD-src-66dabcc793efb40567d212a22a6bd88f4d264dc0.zip FreeBSD-src-66dabcc793efb40567d212a22a6bd88f4d264dc0.tar.gz | |
o Try to do 3.3V support better for the 6722 and 6729/30.
o Bite the bullet and create controller types for the 6729 and also for
the 673x. Rename the 672x to 6722.
o Define minimal extended register info (just register 0xa for reading VS[12]).
# I think the last version may have broken 673x controllers, but this should
# fix them.
Tested on the 6722, but not the 6729.
Ideas from: Chiharu Shibata-san's article in bsd-nomads:15866
Diffstat (limited to 'sys/pccard/i82365.h')
| -rw-r--r-- | sys/pccard/i82365.h | 21 |
1 files changed, 17 insertions, 4 deletions
diff --git a/sys/pccard/i82365.h b/sys/pccard/i82365.h index d7fec2f..6f19bb4 100644 --- a/sys/pccard/i82365.h +++ b/sys/pccard/i82365.h @@ -39,8 +39,8 @@ #define PCIC_I82365 0 /* Intel i82365SL-A/B or clone */ #define PCIC_IBM 1 /* IBM clone */ #define PCIC_VLSI 2 /* VLSI chip */ -#define PCIC_PD672X 3 /* Cirrus logic 672x */ -#define PCIC_PD6710 4 /* Cirrus logic 6710 */ +#define PCIC_PD6722 3 /* Cirrus logic PD6722 */ +#define PCIC_PD6710 4 /* Cirrus logic PD6710 */ #define PCIC_VG365 5 /* Vadem 365 */ #define PCIC_VG465 6 /* Vadem 465 */ #define PCIC_VG468 7 /* Vadem 468 */ @@ -49,6 +49,8 @@ #define PCIC_RF5C396 10 /* Ricoh RF5C396 */ #define PCIC_IBM_KING 11 /* IBM KING PCMCIA Controller */ #define PCIC_I82365SL_DF 12 /* Intel i82365sl-DF step */ +#define PCIC_PD6729 13 /* Cirrus Logic PD6729 */ +#define PCIC_PD673X 14 /* Cirrus Logic PD673x */ /* * Address of the controllers. Each controller can manage @@ -81,10 +83,12 @@ #define PCIC_IO1 0x0c /* I/O Address 1 */ #define PCIC_MEMBASE 0x10 /* Base of memory window registers */ #define PCIC_CDGC 0x16 /* Card Detect and General Control */ -#define PCIC_MISC1 0x16 /* PD672x: Misc control register 1 per slot */ +#define PCIC_MISC1 0x16 /* PD67xx: Misc control register 1 per slot */ #define PCIC_GLO_CTRL 0x1e /* Global Control Register */ -#define PCIC_MISC2 0x1e /* PD672x: Misc control register 2 per chip */ +#define PCIC_MISC2 0x1e /* PD67xx: Misc control register 2 per chip */ #define PCIC_CLCHIP 0x1f /* PD67xx: Chip I/D */ +#define PCIC_EXT_IND 0x2e /* PD67xx: Extended Index */ +#define PCIC_EXTENDED 0x2f /* PD67xx: Extended register */ #define PCIC_CVSR 0x2f /* Vadem: Voltage select register */ #define PCIC_RICOH_MCR2 0x2f /* Ricoh: Mode Control Register 2 */ @@ -248,6 +252,15 @@ #define PCIC_CLC_TOGGLE 0xc0 /* These bits toggle 1 -> 0 */ #define PCIC_CLC_DUAL 0x20 /* Single/dual socket version */ +/* Cirrus Logic: Extended Registers (PCIC_EXT_IND) */ +#define PCIC_EXT_DATA 0x0a /* External Data */ + +/* EXT_DATA */ +#define PCIC_VS1A 0x01 +#define PCIC_VS2A 0x02 +#define PCIC_VS1B 0x04 +#define PCIC_VS2B 0x08 + /* Vadem: Card Voltage Select register (PCIC_CVSR) */ #define PCIC_CVSR_VS 0x03 /* Voltage select */ #define PCIC_CVSR_VS_5 0x00 /* 5.0 V */ |
